An Event-Driven Spiking Compute-In-Memory Macro based on SOT-MRAM

TL;DR

This paper introduces an energy-efficient, event-driven SOT-MRAM-based compute-in-memory macro that uses spike-based processing and a hybrid cell structure to perform matrix-vector multiplication with high energy efficiency.

Contribution

It presents a novel SOT-MRAM CIM macro with spike-driven processing and a hybrid cell design, reducing energy consumption compared to traditional analog circuit-based approaches.

Findings

Achieves 243.6 TOPS/W energy efficiency

Supports matrix-vector multiplication with hybrid cell structure

Eliminates complex analog circuits for decoding signals

Abstract

The application of Magnetic Random-Access Memory (MRAM) in computing-in-memory (CIM) has gained significant attention. However, existing designs often suffer from high energy consumption due to their reliance on complex analog circuits for computation. In this work, we present a Spin-Orbit- Torque MRAM(SOT-MRAM)-based CIM macro that employs an event-driven spiking processing for high energy efficiency. The SOT-MRAM crossbar adopts a hybrid series-parallel cell structure to efficiently support matrix-vector multiplication (MVM). Signal information is (en) decoded as spikes using lightweight circuits, eliminating the need for conventional area- and powerintensive analog circuits. The SOT-MRAM macro is designed and evaluated in 28nm technology, and experimental results show that it achieves a peak energy efficiency of 243.6 TOPS/W, significantly outperforming existing designs.