DecodeX: Exploring and Benchmarking of LDPC Decoding across CPU, GPU, and ASIC Platforms
Zhenzhou Qi, Yuncheng Yao, Yiming Li, Chung-Hsuan Tung, Junyao Zheng, Danyang Zhuo, Tingjun Chen

TL;DR
DecodeX is a comprehensive benchmarking framework that evaluates LDPC decoding performance across CPU, GPU, and ASIC platforms, revealing platform-specific trade-offs and guiding future heterogeneous vRAN designs.
Contribution
The paper introduces DecodeX, a unified framework for benchmarking LDPC decoding across diverse hardware, enabling systematic analysis and optimization for next-generation wireless systems.
Findings
Distinct trade-offs in parallel efficiency and offload overhead across platforms.
Decoding latency varies significantly with data movement and workload granularity.
Insights support adaptive scheduling and co-design for energy-efficient vRANs.
Abstract
Emerging virtualized radio access networks (vRANs) demand flexible and efficient baseband processing across heterogeneous compute substrates. In this paper, we present DecodeX, a unified benchmarking framework for evaluating low-density parity-check (LDPC) decoding acceleration across different hardware platforms. DecodeX integrates a comprehensive suite of LDPC decoder implementations, including kernels, APIs, and test vectors for CPUs (FlexRAN), GPUs (Aerial and Sionna-RK), and ASIC (ACC100), and can be readily extended to additional architectures and configurations. Using DecodeX, we systematically characterize how different platforms orchestrate computation-from threading and memory management to data movement and accelerator offload-and quantify the resulting decoding latency under varying Physical layer parameters. Our observations reveal distinct trade-offs in parallel efficiency…
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Taxonomy
TopicsError Correcting Code Techniques · Software-Defined Networks and 5G · Telecommunications and Broadcasting Technologies
