Learned Cost Model for Placement on Reconfigurable Dataflow Hardware
Etash Guha, Tianxiao Jiang, Andrew Deng, Jian Zhang, Muthu Annamalai

TL;DR
This paper introduces a learned throughput prediction model for dataflow graph placement on reconfigurable hardware, significantly improving accuracy over traditional analytical models and enabling faster compiled graphs.
Contribution
It presents a novel machine learning-based approach for predicting throughput that outperforms hand-designed models without needing performance annotations.
Findings
Predicts throughput 31%-52% more accurately than existing models.
Removes the need for performance annotations without losing accuracy.
Achieves 5.6% faster compiled graphs using the learned model.
Abstract
Mapping a dataflow-graph of an ML model onto a reconfigurable system is difficult, as different mappings have different throughputs and consume resource constraints differently. To solve this, a model to evaluate the throughput of mappings is necessary as measuring throughput completely is expensive. Many use a hand-designed analytical model, relying on proxy features or intuition, introducing error. We provide a Learned Approach that predicts throughput 31%-52% more accurately over a variety of graphs. In addition, our approach shows no accuracy degradation after removing performance annotations. We show that using this approach results in 5.6% faster compiled graphs.
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Taxonomy
TopicsEmbedded Systems Design Techniques · Parallel Computing and Optimization Techniques · Formal Methods in Verification
