The Fast for the Curious: How to accelerate fault-tolerant quantum applications

TL;DR

This paper explores strategies to accelerate fault-tolerant quantum computations by optimizing hardware and algorithms, aiming to make quantum applications more practical for scientific and industrial use.

Contribution

It discusses co-design approaches for hardware, fault tolerance, and algorithms to reduce quantum run times, supported by resource estimates for specific simulations.

Findings

Co-design of hardware and algorithms can significantly reduce quantum computation times.

Trade-offs between run time, qubit count, and engineering complexity are crucial for practical quantum computing.

Resource estimates demonstrate potential improvements in simulating complex models.

Abstract

We evaluate strategies for reducing the run time of fault-tolerant quantum computations, targeting practical utility in scientific or industrial workflows. Delivering a technology with broad impact requires scaling devices, while also maintaining acceptable run times for computations. Optimizing logical clock speed may require moving beyond current strategies, and adopting methods that trade faster run time for increased qubit counts or engineering complexity. We discuss how the co-design of hardware, fault tolerance, and algorithmic subroutines can reduce run times. We illustrate a selection of these topics with resource estimates for simulating the Fermi-Hubbard model.