FPGA-based Lane Detection System incorporating Temperature and Light Control Units

TL;DR

This paper presents an FPGA-based lane detection system for intelligent vehicles that uses Sobel edge detection and includes environmental control units for improved adaptability, achieving fast processing speeds.

Contribution

It introduces a novel FPGA architecture for lane detection with integrated temperature and light control, enhancing system robustness and environmental adaptability.

Findings

Processes 416x416 images at 150 MHz with 1.17 ms latency

Provides lane count, index, and boundary detection outputs

Includes environmental controls for better system performance

Abstract

Intelligent vehicles are one of the most important outcomes gained from the world tendency toward automation. Applications of IVs, whether in urban roads or robot tracks, do prioritize lane path detection. This paper proposes an FPGA-based Lane Detector Vehicle LDV architecture that relies on the Sobel algorithm for edge detection. Operating on 416 x 416 images and 150 MHz, the system can generate a valid output every 1.17 ms. The valid output consists of the number of present lanes, the current lane index, as well as its right and left boundaries. Additionally, the automated light and temperature control units in the proposed system enhance its adaptability to the surrounding environmental conditions.