An efficient probabilistic hardware architecture for diffusion-like models

TL;DR

This paper introduces a scalable, transistor-based probabilistic hardware architecture that efficiently implements denoising models, potentially matching GPU performance with significantly lower energy consumption.

Contribution

The work presents a novel all-transistor probabilistic computer architecture that overcomes previous limitations and enables efficient hardware implementation of diffusion-like models.

Findings

Potential to match GPU performance on image benchmarks

Achieves approximately 10,000 times less energy consumption

Addresses scalability issues of previous probabilistic hardware proposals

Abstract

The proliferation of probabilistic AI has prompted proposals for specialized stochastic computers. Despite promising efficiency gains, these proposals have failed to gain traction because they rely on fundamentally limited modeling techniques and exotic, unscalable hardware. In this work, we address these shortcomings by proposing an all-transistor probabilistic computer that implements powerful denoising models at the hardware level. A system-level analysis indicates that devices based on our architecture could achieve performance parity with GPUs on a simple image benchmark using approximately 10,000 times less energy.