Real-time decoding of the gross code memory with FPGAs

TL;DR

This paper presents a fast FPGA-based decoder for quantum error correction codes, achieving high speed and accuracy suitable for scalable fault-tolerant quantum computing.

Contribution

It introduces a novel FPGA decoder implementing the Relay-BP algorithm, demonstrating real-time decoding capabilities for quantum low-density parity check codes.

Findings

Achieves 24ns belief propagation iteration time.

Matches floating-point error performance with reduced precision.

Decodes within 1 microsecond per cycle for certain error rates.

Abstract

We introduce a prototype FPGA decoder implementing the recently discovered Relay-BP algorithm and targeting memory experiments on the $[[144,12,12]]$ bivariate bicycle quantum low-density parity check code. The decoder is both fast and accurate, achieving a belief propagation iteration time of 24ns. It matches the logical error performance of a floating-point implementation despite using reduced precision arithmetic. This speed is sufficient for an average per cycle decoding time under $1\,\mathrm{\mu s}$ assuming circuit model error probabilities are less than $3 \times 10^{-3}$. This prototype decoder offers useful insights on the path toward decoding solutions for scalable fault-tolerant quantum computers.