In-DRAM True Random Number Generation Using Simultaneous Multiple-Row Activation: An Experimental Study of Real DRAM Chips
Ismail Emir Yuksel, Ataberk Olgun, F. Nisa Bostanci, Oguzhan Canpolat, Geraldo F. Oliveira, Mohammad Sadrosadati, Abdullah Giray Yaglikci, Onur Mutlu

TL;DR
This paper experimentally demonstrates that commercial DRAM chips can generate high-quality true random numbers at high throughput using simultaneous multiple-row activation, with analysis of factors affecting entropy and performance.
Contribution
It introduces SiMRA, a novel method leveraging simultaneous multi-row activation in DRAM for true random number generation, with extensive experimental validation on real chips.
Findings
All SiMRA-based TRNG designs pass NIST randomness tests.
Higher number of activated rows increases entropy and throughput.
Operational conditions like temperature significantly impact entropy levels.
Abstract
In this work, we experimentally demonstrate that it is possible to generate true random numbers at high throughput and low latency in commercial off-the-shelf (COTS) DRAM chips by leveraging simultaneous multiple-row activation (SiMRA) via an extensive characterization of 96 DDR4 DRAM chips. We rigorously analyze SiMRA's true random generation potential in terms of entropy, latency, and throughput for varying numbers of simultaneously activated DRAM rows (i.e., 2, 4, 8, 16, and 32), data patterns, temperature levels, and spatial variations. Among our 11 key experimental observations, we highlight four key results. First, we evaluate the quality of our TRNG designs using the commonly-used NIST statistical test suite for randomness and find that all SiMRA-based TRNG designs successfully pass each test. Second, 2-, 8-, 16-, and 32-row activation-based TRNG designs outperform the…
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Taxonomy
TopicsChaos-based Image/Signal Encryption · Low-power high-performance VLSI design · Physical Unclonable Functions (PUFs) and Hardware Security
