A Multi-Threading Kernel for Enabling Neuromorphic Edge Applications
Lars Niedermeier (1, 3), Vyom Shah (2), and Jeffrey L. Krichmar (2, 3) ((1) Niedermeier Consulting, Zurich, ZH, Switzerland, (2) Department of Computer Science, University of California, Irvine, CA, USA, (3) Department of Cognitive Sciences, University of California, Irvine, CA

TL;DR
This paper introduces a multi-threading kernel for neuromorphic edge applications, significantly improving processing speed and energy efficiency of Spiking Neural Networks on mobile hardware.
Contribution
It presents a novel multi-threading kernel that enables efficient, load-balanced, and energy-saving neuromorphic processing directly on edge devices.
Findings
4x speed-up on moderately sized SNNs
1.7x speed-up on Synfire network
Up to 70% energy efficiency improvement
Abstract
Spiking Neural Networks (SNNs) have sparse, event driven processing that can leverage neuromorphic applications. In this work, we introduce a multi-threading kernel that enables neuromorphic applications running at the edge, meaning they process sensory input directly and without any up-link to or dependency on a cloud service. The kernel shows speed-up gains over single thread processing by a factor of four on moderately sized SNNs and 1.7X on a Synfire network. Furthermore, it load-balances all cores available on multi-core processors, such as ARM, which run today's mobile devices and is up to 70% more energy efficient compared to statical core assignment. The present work can enable the development of edge applications that have low Size, Weight, and Power (SWaP), and can prototype the integration of neuromorphic chips.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsAdvanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices · Parallel Computing and Optimization Techniques
