A Framework of Arithmetic-Level Variable Precision Computing for In-Memory Architecture: Case Study in MIMO Signal Processing

TL;DR

This paper introduces a unified framework for variable precision computing in in-memory architectures, optimizing arithmetic precision to enhance wireless MIMO signal processing performance and reduce complexity.

Contribution

It proposes a novel arithmetic-level variable precision computing framework with error modeling and optimization algorithms for in-memory systems.

Findings

Achieves up to 60% sum-rate improvement in MIMO precoding.

Reduces computational complexity by up to 30%.

Reveals Pareto boundary between performance and complexity.

Abstract

Computational complexity poses a significant challenge in wireless communication. Most existing attempts aim to reduce it through algorithm-specific approaches. However, the precision of computing, which directly relates to both computing performance and computational complexity, is a dimension that is fundamental but rarely explored in the literature. With the emerging architecture of in-memory computing, variable precision computing (VPC) is enabled, allowing each arithmetic operation to be processed with a distinct and specifically optimized computing precision. In this paper, we establish a unified framework of arithmetic-level variable precision computing (AL-VPC), which aims to determine the optimized computing precision for each arithmetic operation. We first develop an arithmetic propagation error model exploiting stochastic analysis, and then formulate a mathematical optimization problem to strike balance between computing performance and computational complexity. Two algorithms, namely, offline VPC and online VPC, are proposed to solve the problem considering various practical concerns. Particularly, in a case study on zero-forcing (ZF) precoding, we reveal the Pareto boundary between computing performance and complexity, which exhibits up to a 60% sum-rate enhancement or equivalently up to a 30% complexity reduction compared to the traditional fixed-length methods.

Tables

Table 1. TABLE I: Spec Comparison Between eBFP and IEEE-754 Standard

	Total bit width (bit)	Exponent (bit)	Fraction (bit)	Maximum value (E)	Relative error
IEEE-754 half-precision	16	5	10	4.51	9.77e-4
eBFP N3	24	7	16	154.13	9.72e-4
IEEE-754 single-precision	32	8	23	38.23	1.19e-7
eBFP N5	40	7	32	154.13	1.48e-8
IEEE-754 double-precision	64	11	52	307.95	2.22e-16
eBFP N9	72	7	64	154.13	3.46e-18

Table 2. TABLE II : 𝔼 ​ { C } \mathbb{E}\{C\} and σ c 2 \sigma_{c}^{2} of Basic Arithmetics

Arithmetic	Mean	Variance
Addition	0	$\left(a^2{\sigma }_a^2+b^2{\sigma }_b^2\right)/{\left(a+b\right)}^2$
Subtraction	0	$\left(a^2{\sigma }_a^2+b^2{\sigma }_b^2\right)/{\left(a-b\right)}^2$
Multiplication	0	${\sigma }_a^2+{\sigma }_b^2\left(+{\sigma }_a^2{\sigma }_b^2\right)$
Division	0	${\sigma }_a^2+{\sigma }_b^2$
Square root	0	${\sigma }_a^2/4$

Table 3. TABLE III: σ W 2 \sigma_{W}^{2} and 𝔼 ​ [ W ] \mathbb{E}\left[W\right] with respect to x x ( ε = 2 \varepsilon=2 )

$x$	1	3	5	7	9	11	13
${\sigma }_W^2$	0.353	0.213	0.179	0.170	0.167	0.167	0.167
$𝔼\left[W\right]$	-0.09	-6e-3	-4e-4	-3e-5	-2e-6	-1e-7	-6e-9

Table 4. TABLE IV: Expectation of the Number of Additions/Subtractions Needed for One-bit Change in x opt x^{\rm{opt}}

$e_b$	5	8	11
Corresponding float point configuration	IEEE-754 half precision	IEEE-754 single precision	IEEE-754 double precision
Addition	9	63	493
Subtraction	3	30	245
Addition & Subtraction	8	114	974

Table 5. TABLE V: Average Computing Precision Used in Fig.  7

SNR figure	SNR 10 dB	SNR 20 dB	SNR 30 dB	/
Average computing precision (bit)	12	14	17	/
Antenna array figure	$4\times 4$ array	$8\times 8$ array	$16\times 16$ array	$32\times 32$ array
Average computing precision (bit)	9	10	12	18
$K$ figure	$K=4$	$K=8$	$K=12$	$K=16$
Average computing precision (bit)	10	10	11	12

Equations

$$\frac{\partial o_u}{\partial x}\ge 0,\forall u$$

$$\frac{\partial {\sigma }_t^2}{\partial {\sigma }_a^2}\ge 0,\frac{\partial {\sigma }_t^2}{\partial {\sigma }_b^2}\ge 0,\frac{\partial {\sigma }_t^2}{\partial x}\le 0,$$

$$\underset{x}{\mathrm{minimize}}$$

$$x_{\text{min}}\le x\le x_{\text{max}},x\in \mathbb{N},$$

$$G={\sigma }_t^2(x)+\alpha o_u(x),$$

$$\frac{\partial G}{\partial x}=\underset{<0}{\underbrace{\frac{\partial G}{\partial {\sigma }_t^2}\frac{\partial {\sigma }_t^2}{\partial x}}}+\underset{>0}{\underbrace{\frac{\partial G}{\partial o_u}\frac{\partial o_u}{\partial x}}},$$

$$\frac{{\partial }^{2}G}{\partial x^2}$$

$$\underset{x_{nk}}{\mathrm{minimize}}$$

$$x_{nk,\text{min}}\le x_{nk}\le x_{nk,\text{max}},$$

$$x_{nk}\in \mathbb{N},n=1,\cdots ,N,k=1,\cdots ,k_n,$$

$$G_N=F\left({\sigma }_{N0},\cdots ,{\sigma }_{N{k}_N}\right)+\alpha \sum _{n=1}^N\sum _{k=1}^{k_n}{o}_{u,nk}.$$

$$C=\frac{a\left(1+A\right)+b\left(1+B\right)-\left(a+b\right)}{a+b}=\frac{aA+bB}{a+b},$$

$${\sigma }_c^2=\mathbb{V}\left[\frac{aA+bB}{a+b}\right]=\frac{a^2{\sigma }_a^2+b^2{\sigma }_b^2}{{\left(a+b\right)}^2},$$

$$C=\frac{a\left(1+A\right)b\left(1+B\right)-ab}{ab}=A+B+AB.$$

$${\sigma }_c^2$$

$$+{\sigma }_a^2{\sigma }_b^2+{\left(\mathbb{E}\left[A\right]\right)}^2{\sigma }_b^2+{\left(\mathbb{E}\left[B\right]\right)}^2{\sigma }_a^2.$$

$${\sigma }_c^2={\sigma }_a^2+{\sigma }_b^2+{\sigma }_a^2{\sigma }_b^2.$$

$$C=\frac{\frac{a\left(1+A\right)}{b\left(1+B\right)}-\frac{a}{b}}{\frac{a}{b}}=\frac{A-B}{1+B},$$

$${\sigma }_c^2$$

$$-2\mathrm{Cov}\left(\frac{A}{1+B},\frac{B}{1+B}\right),$$

$$\frac{X}{Y}$$

$$+f_Y^{\prime }(\delta )(Y-\mathbb{E}\left[Y\right])+O\left(X,Y\right),$$

$$\mathbb{E}\left[\frac{X}{Y}\right]$$

$$=\frac{\mathbb{E}\left[X\right]}{\mathbb{E}\left[Y\right]},$$

$$\mathbb{V}\left[\frac{X}{Y}\right]$$

$$\displaystyle=\left(\frac{\mathbb{E}\left[X\right]}{\mathbb{E}\left[Y\right]}\right)^{2}\bigg{[}\frac{\mathbb{V}\left[X\right]}{\left(\mathbb{E}\left[X\right]\right)^{2}}+\frac{\mathbb{V}\left[Y\right]}{\left(\mathbb{E}\left[Y\right]\right)^{2}}$$

$$\displaystyle\quad-2\frac{\operatorname{Cov}\left(X,Y\right)}{\mathbb{E}\left[X\right]\mathbb{E}\left[Y\right]}\bigg{]}.$$

$$\mathbb{V}\left[\frac{A}{1+B}\right]$$

$$={\sigma }_a^2,$$

$$\mathrm{Cov}\left(\frac{A}{1+B},\frac{B}{1+B}\right)=\mathbb{E}\left[A\right]\mathrm{Cov}\left(\frac{1}{1+B},\frac{B}{1+B}\right)=0.$$

$${\sigma }_c^2={\sigma }_a^2+{\sigma }_b^2.$$

$$C=\frac{\sqrt{a\left(1+A\right)}-\sqrt{a}}{\sqrt{a}}=\sqrt{1+A}-1.$$

$${\sigma }_c^2$$

$$E=\frac{X-\mathrm{Round}\left(X\right)}{X},$$

Full text

I Introduction

Signal processing for massive multiple-input multiple-output (MIMO) in future wireless communication networks is confronted with new challenges related to its required computational complexity[15, 41], stemming from its extensive matrix operations and the demand for high data rates [30]. Previous research endeavors in MIMO signal processing mainly focused on designing particular algorithms to mitigate computational complexity, e.g., by exercising meticulous control over the steps of iterations[43, 12]. Since these approaches are algorithm-specific, they lack generality.

In recent years, a novel hardware architecture, known as in-memory computing, has emerged as a promising solution aimed at substantially reducing computational latency from a hardware perspective[1]. This architecture exhibits a high level of generality that it could benefit all signal processing algorithms[16]. Unlike the traditional Von Neumann architecture, which stores data in memory and processes data in a central processing unit (CPU), the in-memory computing architecture performs both data storage and processing within the memory. This innovation effectively mitigates the predominant latency stemming from data transfer between the CPU and memory. In general, in-memory computing can be classified into two categories: process in memory (PIM)[2] and process near memory (PNM)[3]. However, the intrinsic constraints of the in-memory architecture limits its operation to low bit-width[1], making it only suitable for low-precision calculations. This constraint often results in computational errors that significantly undermine the computing performance of signal processing[44, 16]. Indeed, this inherent limitation of in-memory computing naturally calls for investigation into the relationship between computing precision, latency, and the performance.

Signal processing algorithms for MIMO communication, e.g., multiuser precoding calculations, inherently demand a high level of computing precision[13]. Nevertheless, this pursuit of high precision introduces a conundrum in the form of elevated computational complexity, leading to prolonged computing latency. Since latency is a pivotal performance indicator in future wireless designs, especially for latency-sensitive applications, it becomes crucial to manage the complexity of precoding calculations while satisfying latency requirements[38, 19, 40]. Typical approaches for controlling computational complexity encompass meticulous control over algorithm iterations[25], as well as formulating optimization problems that strike a balance between performance and complexity[5, 39]. There are also some results which implement low bit width computing in a certain part of MIMO signal processing. Typically, in quantized precoding, finite-alphabet equalization has been proposed to reduce the computational complexity of the MMSE decoding process [37, 34, 35], achieving near-optimal performance with significantly reduced complexity.

In practical scenarios, computing precision is directly associated with complexity. Essentially, for a given algorithm, a constraint on complexity translates into a constraint on the average computing precision. Under such constraints, one potential approach to enhance the computing performance involves allocating higher computing precision to more crucial steps[22, 42]. This approach is commonly known as variable precision computing (VPC)[27]. A typical VPC method divides an algorithm into several partitions and subjectively assigns varying computing precision to different partitions[26, 29, 9, 17]. However, signal processing algorithms for MIMO communication often pose challenges in terms of separability, making it difficult to directly apply VPC to wireless communication-related algorithms. In deed, even if an algorithm can be logically partitioned, determining which section deserves higher computing precision remains an open problem.

To fully explore the potential of VPC, it is imperative to scale down each partition of the algorithm to its smallest possible unit, with each partition comprising at least a single basic arithmetic operation. This concept is termed arithmetic-level VPC (AL-VPC). However, it is challenging to achieve AL-VPC in practice as it is nearly impossible to subjectively determine the relative importance of each arithmetic operation in an algorithm, particularly within complex MIMO signal processing algorithms such as precoding calculations. Since the importance of each arithmetic operation correlates directly to its error propagation behaviour[6], a thorough investigation into this matter becomes imperative. Though this topic has been studied over decades, e.g., [4, 7, 8], they either base on Gaussian hypothesis or only consider a single arithmetic operation. To the best of our knowledge, there are no comprehensive results that fully unveil the statistical characteristic of error propagation of all basic arithmetics that motivates the study of this work.

In this paper, we establish the first framework of AL-VPC, achieved through the derivation of stochastic arithmetic propagation errors. This approach offers an objective means to assess the significance of each arithmetic operation within an algorithm, consequently enabling the proposal of tailored computing precision assignments for each arithmetic operation. The contributions of this paper are summarized as follows.

• •

A general framework of AL-VPC with mathematical modeling is introduced. To model the procedure of a generic algorithm, the concept of expression tree is proposed. Utilizing the expression tree, an optimization problem is formulated to effectively optimize the assignments of computing precision at the arithmetic level.

• •

A stochastic model of arithmetic propagation error is established. The expectation and variance of the error of basic arithmetic operations are derived.

• •

Two algorithms, named online VPC and offline VPC, are proposed to solve the optimization problem. Specifically, the online VPC aims to achieve an optimal balance between computing performance and computational complexity, while the offline VPC focuses on facilitating simpler implementation.

• •

A case study of multiuser MIMO precoding is examined. The proposed AL-VPC achieves up to a 60% sum-rate enhancement or equivalently a 30% complexity reduction, compared to conventional fixed-length computing.

The rest of this paper is organized as follows. Section II introduces the framework of AL-VPC and the related optimization problem. A stochastic model of error propagation is established in Section III. The solution to the formulated problem is solved in Section IV. Numerical simulations, along with the case study, are presented in Section V. Section VI concludes this paper.

II Arithmetic-Level Variable Precision Computing for Signal Processing

In this section, we present an introduction to VPC and propose a general framework of AL-VPC. The conventional approach of VPC involves the partitioning of an algorithm into several larger partitions, each comprising hundreds or potentially millions of arithmetic operations [26]. These partitions are then assigned with varying levels of computing precision based on subjective assessments of their functionalities. This is suitable for algorithms with distinctive section divisions and explicit physical interpretations[27]. Unfortunately, the majority of signal processing algorithms do not always exhibit such clear-cut features. In contrast, the proposed AL-VPC divides an algorithm into basic arithmetic operations, making it applicable to any algorithm. In this context, conventional VPC emerges as a special case of AL-VPC.

Despite the considerable benefits, designing AL-VPC poses notable challenges, arising from the requirement of optimizing the arithmetic-level computing precision for each individual algorithm. In the following, we provide a detailed elaboration on the framework of AL-VPC.

II-A *A New Storage Scheme: eBFP *

In order to fully utilize the advantage of AL-VPC, a storage scheme with more precision options is favorable as it provides more freedom to optimize. However, existing storage scheme can not satisfy this demand, as conventional IEEE-754 standard only has four available precision, while fixed-point suffers from a critical constraint on the range of representable numbers. In addition, in-memory architectures inherently support only low bit-width computations, which are often insufficient to meet the accuracy requirements of signal processing algorithms. Therefore, we hereby design a brand new storage scheme, namely extended block floating point (eBFP), to support in-memory computing and AL-VPC.

eBFP divides the bits of a number into $F$ bits blocks, and define its exponent as the index of its first block. The first $F$ bits left to the decimal point is defined as the ‘zero’ block with index 0. Other blocks are indexed from left to right with descending index number. Then, the index of the first block $e$ is then encoded as $e_{754}=e+2^{E-2}-1$ to become the exponent of the eBFP number, where $E$ is the bit width of the exponent. Finally, first $N$ blocks are stored as fraction blocks with ‘0’s added in front of the first block if needed. In total, eBFP has three parameters. $F$ controls the density of the available precision; $E$ controls the range of storage; while $N$ controls the precision of the number. We give a brief demonstration of the transition between a fixed-point number and an eBFP number in Fig. 1.

Compared to the standard IEEE-754, eBFP maintains a consistent width for exponent regardless of the number of blocks, which enables precision adjustments without altering the representation range. This feature aligns well with practical needs, as precision control often necessitates maintaining a consistent representation range. The precision of eBFP is determined by the number of blocks, offering finer control over precision adjustment compared to IEEE-754. Crucially, each eBFP block holds a specific physical significance, facilitating storage and calculations at the block level. This feature enables in-memory architectures to achieve high-precision computation by combining multiple low-precision computations.

We present a specification comparison between the configurations of eBFP and IEEE-754 in Table I. For all eBFP specifications listed, $E=F=8$ is selected, and eBFP N$x$ denotes an eBFP number with $x$ fraction blocks. To employ eBFP into simulation, we also design each arithmetic operation from most basic logic operation, e.g., and, or, all the way to matrix operations, to enable MIMO signal processing algorithms. A more detailed introduction to the proposed eBFP is provided in Appendix A.

II-B Expression Tree

The second step in executing AL-VPC involves the segmentation of an algorithm into its basic arithmetic operations. Specifically, common linear precoding schemes in MIMO systems are composed of basic arithmetic operations, i.e., addition, subtraction, multiplication, division, and square root. Other arithmetic operations, e.g., complex and matrix arithmetics, can be broken down into a sequence of these basic arithmetic operations. In addition, regardless of the initial input data, all algorithms inherently structure their arithmetic operations in a specific sequence. In computer science, the arithmetic operations of an algorithm are often represented using rooted trees [14, Sec. 8.3], which are also known as expression trees. For any given algorithm, a corresponding expression tree can always be constructed.

Fig. 1 shows an example of an expression tree exploited in AL-VPC. In Fig. 1(a), the error propagation of a one-step finite-precision arithmetic is depicted with two operands. The arithmetic operation includes two steps. The first step is full-precision arithmetic which takes $a$ and $b$ as the inputs and outputs $c$, while the second step truncates $c$ to the desired precision and stores it as $t$. Denote the the precision of each number, i.e., bit width of the fraction of the number, by $x_{a}$, $x_{b}$, $x_{c}$, and $x_{t}$, respectively. Note that $x_{c}$ for the full-precision arithmetic is defined as the minimal computing precision that does not introduce new errors to the calculation. Further denote the corresponding relative errors of each number by $A$, $B$, $C$, and $T$ with variance of $\sigma_{a}^{2}$, $\sigma_{b}^{2}$, $\sigma_{c}^{2}$, and $\sigma_{t}^{2}$, respectively. During the process of this arithmetic operation, our primary focus on the variances of the errors. In the first step of full-precision arithmetic, $\sigma_{c}^{2}$ is related to $\sigma_{a}^{2}$ and $\sigma_{b}^{2}$, which can be treated as a transformation of random variables from $A$ and $B$ to $C$. In the second step of rounding, $\sigma_{t}^{2}$ depends on $\sigma_{c}^{2}$ and $x_{t}$.

Given the error propagation of the one-step arithmetic operation in Fig. 1(a), Fig. 1(b) shows the expression tree for a specific algorithm. In particular, $\sigma_{a}^{2}$, $\sigma_{b}^{2}$, and $\sigma_{t}^{2}$ in Fig. 1(a) correspond to $\sigma_{01}^{2}$, $\sigma_{02}^{2}$, and $\sigma_{11}^{2}$, respectively, in Fig. 1(b). We adopt ${\cal R}_{nk}$ to define the operand, where $n\in\{1,\dots,N\}$ refers to the number of steps and $k$ denotes the index of the operand in the step. Also, ${\cal R}_{0j},j\in\{1,2,3,\cdots,k_{0}\}$, are the $k_{0}$ initial operands given to the algorithm. $x_{nk}$ is defined as the computing precision of the respective arithmetic operation. $N$ is the number of sequential steps to obtain the final result. Note that initial inputs to the algorithm also consist error, as they are results of previous algorithms.

With the structure of the expression tree, an optimization problem can be formulated to address the trade-off between computing precision and computational complexity. In the following subsection, we start with modelling the one-step arithmetic operation in Fig. 1(a) and then proceed to derive an extension to multi-step arithmetic operations in Fig. 1(b).

II-C Optimization for One-step Arithmetic Operation

To start, we define $o_{u}\left(x\right)$ as a measure of computational complexity, where $x$ represents computing precision of the arithmetic and $u\in\{\text{addition},\text{subtraction},$ $\text{multiplication},\text{division},\text{square root}\}$. Though $o_{u}$ differs among arithmetics, it is monotonically increasing with respect to (w.r.t.) the computing precision. While $x\in\mathbb{N}$, for the ease of tractability, we might temporarily treat it as continuous to facilitate analysis such that

[TABLE]

holds in general. In addition, we also assume that $o_{u}$ is convex w.r.t. $x$.

Next, we can establish the relationship between $\sigma_{t}^{2}$ and $\{\sigma_{a}^{2},\sigma_{b}^{2},x\}$ as

[TABLE]

which hold because the error variance of the result is positively related to the error variance of operands and negatively related to the computing precision.

We then formulate a multi-objective optimization problem for the one-step arithmetic operation in Fig. 1(a) as

[TABLE]

where $x_{\text{min}}$ and $x_{\text{max}}$ are the minimum and maximum available computing precision of the computing device, which follows hardware constraint and subjective control.

In general, the Pareto boundary can be exploited to characterize the trade-off between the two objectives in (3). Suppose there is a general utility function, $G\left(\sigma_{t}^{2},o_{u}\right)$, that serves as an equivalent single objective to replace the dual objectives. In practice, given that the form of $G$ does not affect the optimality, we define it as

[TABLE]

where $\alpha\in(0,\infty)$ represents an indicator for balancing computing precision and complexity. With this explicit form of $G$, we have the convexity discussed in the following lemma.

Lemma 1**.**

$G$* of form (4) is convex w.r.t. $x$. *

Proof: We start with the first-order derivative of $G$ as

[TABLE]

where $\frac{\partial G}{\partial\sigma_{t}^{2}}=1$, and $\frac{\partial G}{\partial o_{u}}>0$.

Then, we have the second-order derivative of $G$ w.r.t. $x$ as

[TABLE]

where $\frac{\partial^{2}\sigma_{t}^{2}}{\partial x^{2}}>0$ comes from (26). From (6), $G$ is a convex function. $\hfill\square$

II-D Optimization for a Multi-step Algorithm

For a complete algorithm, arithmetic operations are usually arranged in a specific order, from which an expression as depicted in Fig. 1(b) can be established. Analogously to (3), we can formulate an optimization problem for computing precision assignment in multi-step algorithms as follows:

[TABLE]

where $F\left(\cdot\right)$ captures the relationship between the performance of the algorithm and the error of the final result, $o_{u,nk}$ and $x_{nk}$ are the computational complexity and computing precision of the arithmetic with ${\cal R}_{nk}$, respectively.to Similarly, we use an utility function $G_{N}$ to trade-off between two objectives

[TABLE]

With the general formulation established, we first analyze the arithmetic propagation error in Section III and then work on the solution to problem (7) in Section IV.

III Arithmetic Propagation Error based on Stochastic Analysis

The key to solving problem (3) and (7) is to explicitly obtain the expression of the variance of the error, i.e., the mathematical relationship between $\sigma_{t}^{2}$ and $\{\sigma_{a}^{2},\sigma_{b}^{2},x\}$ in (3). In this section, we analyze the stochastic characteristic of one-step propagation error in Fig. 1(a). In the sequel, we first derive the error of full-precision arithmetics by performing the transformation of the random variables to obtain $\sigma_{c}^{2}$, as well as the rounding error to obtain $\sigma_{t}^{2}$. In the following, we assume that all the variance of the relative errors is much smaller than 1, which is well-justified in practice.

III-A Error of Full-Precision Arithmetic

We directly present the error of full-precision arithmetic in Lemma 2 by deriving the essential statistics of $\sigma_{c}^{2}$.

Lemma 2**.**

The mean and variance of the error of full-precision arithmetic are listed in Table I.

Proof: We first derive the variance of $C$. Since the proof for subtraction is very similar to the one of addition, it is omitted for brevity.

III-A1 Addition

For an addition of two operands, say, $a+b$, the resulting relative error is expressed as

[TABLE]

and the variance of $C$ is

[TABLE]

where the definitions of variables refer to Section II-A, and $\mathbb{V}\left[\cdot\right]$ represents the variance operator.

III-A2 Multiplication

For a multiplication of two operands, say, $ab$, it follows

[TABLE]

Then, the variance of $C$ equals

[TABLE]

Supposing that $\mathbb{E}\left[A\right]=\mathbb{E}\left[B\right]=0$ (this assumption will be discussed later), we have

[TABLE]

Note that if the computing precision is relatively high, $\sigma_{a}^{2}\sigma_{b}^{2}$ is negligible.

III-A3 Division

For a division of two operands, say, $a/b$, it follows

[TABLE]

and the variance of $C$ is

[TABLE]

where $\operatorname{Cov}\left(\cdot,\cdot\right)$ represents the covariance operator.

We then derive $\mathbb{V}\left[\frac{X}{Y}\right]$. Applying the first-order Taylor expansion to $f(X,Y)=X/Y$ at $\delta=(\mathbb{E}\left[X\right],\mathbb{E}\left[Y\right])$, we obtain

[TABLE]

where $O\left(X,Y\right)$ is a remainder of smaller order. Then, the expectation and variance can be obtained as

[TABLE]

[TABLE]

Therefore, we have

[TABLE]

and similarly $\mathbb{V}\left[\frac{B}{1+B}\right]=\sigma_{b}^{2}$. In addition, assuming $\mathbb{E}\left[A\right]=0$, it follows

[TABLE]

Now, by substituting (19) and (20) into (15), it yields

[TABLE]

III-A4 Square root

For a square root of one operand, say, $\sqrt{a}$, it follows

[TABLE]

With the techniques similar to division, the variance of $C$ is given as

[TABLE]

Now we derive the mean of $C$. Assuming $\mathbb{E}\left[A\right]=\mathbb{E}\left[B\right]=0$, it is easy to check that $\mathbb{E}\left[C\right]=0$ for all arithmetics. It implies that if the error of initial input numbers have zero means, all the results have statistically zero-mean errors. $\hfill\square$

Remark 1**.**

*Variances of addition and subtraction depend on the values of their operands, while the variances of multiplication, division, and square root do not rely on their operands. *

The relative error variances for multiplication, division, and square root are independent of the operand values. These operations exhibit a more predictable error behavior under relative metrics, enabling their error variances to be estimated or bounded analytically, even before the actual inputs are known. This important remark will be exploited in Section IV to facilitate the solution to problem (7).

III-B Error of Rounding

Given the error of the full-precision arithmetic, i.e., $\sigma_{c}^{2}$, in the previous subsection, we next derive the error introduced by rounding, i.e., the relationship between $\sigma_{c}^{2}$ and $\sigma_{t}^{2}$ in Fig 1(a).

To characterize the distribution of the error introduced by rounding, we introduce a real-valued random variable $X$ and the corresponding rounding error $E$. It follows

[TABLE]

where

[TABLE]

and $\mathbb{F}$ is the set of all representable numbers in the floating-point.

Since $E$ is a random variable, it is also common to represent $E$ as $E=r\left(x\right)W$, where $r\left(x\right)=\varepsilon^{-x-1}$ is the maximum rounding error, $W\in\left[-1,1\right]$ is a corresponding random variable [4], and $\varepsilon$ is the base of storage, e.g., $\varepsilon=2$ for binary storage. In this context, the statistical characteristics of $W$ is equivalent to those of $E$, which can be exploited to facilitate the following derivation. Follow the definition of rounding error, we derive the relationship between $\sigma_{c}^{2}$ and $\sigma_{t}^{2}$ in the following theorem.

Theorem 1**.**

For any arithmetic operation, the variance of rounding error is

[TABLE]

where $\mathbb{E}\left[W\right]$ and $\sigma_{W}^{2}$ are respectively the expectation and variance of $W$. When the computing precision is sufficiently high, we have a tight approximation as

[TABLE]

Proof: Following the definitions in Section II-A and Section III-A, the variance of the rounding error is expressed as

[TABLE]

When $x\rightarrow\infty$, it has been proved in [4] that the PDF of $W$ is (29).

Note that when $x$ is sufficiently large, $f_{W}\left(w\right)$ converges and becomes independent of $x$, so does $\sigma_{W}^{2}$, which means the rounding error becomes independent with the signal. Table III shows the convergence values of $\sigma_{W}^{2}$ and $\mathbb{E}\left[W\right]$, when $\varepsilon$ is set to 2 for the binary case.

It is obvious that in the binary case, $\sigma_{W}^{2}$ converges to 0.167 and $\mathbb{E}\left[W\right]$ converges to zero. For other bases, similar results can be obtained. Consequently, the approximation in (27) is obtained. $\hfill\square$

Remark 2**.**

*The calculation of the variance of the rounding error can be separated from the calculation of the variance of the full-precision arithmetic. *

This remark confirms that the propagation error of a one-step arithmetic operation can be derived with two distinct steps.

Thus far, we have derived a stochastic model for characterizing the one-step arithmetic propagation error as illustrated in Fig. 1(a), which is exploited in the explicit formulation of problem (7) of Fig. 1(b).

IV Problem Formulation and Optimization for Multi-step Algorithm

In this section, we develop two algorithms to address the optimization problem of computing precision assignment for a multi-step algorithm as described in problem (7). Unlike the problem of the one-step arithmetic in (3), the convexity of problem (7) is generally unclear, which means that it is generally challenging to solve with conventional methods.

IV-A Explication of Problem (7)

To start with, we temporarily set aside the constraint of problem (7). A sub-optimal solution can be obtained by examining $\partial G_{N}/\partial x_{nk}=0$. By applying the chain rule of derivatives, $\partial G_{N}/\partial x_{nk}$ is written in (30) following the back propagation of the arithmetic operations after ${\cal R}_{nk}$ in Fig. 1(b) with the circled values calculated in (38), where $a$ and $b$ refer to the two operands of the arithmetic. Note that
1 is derived from (26),
2 is obtained from Table I, and
3 adopts (26) with $r\left(x\right)=\varepsilon^{-x-1}$.

[TABLE]

The expression in (30) is a bit involved. To elucidate, let us consider an example from Fig. 3 which contains six arithmetic operations and aim to optimize $x_{22}$. We first compose $\partial G_{N}/\partial x_{22}=0$ using the back propagation from the final result of the algorithm to ${\cal R}_{22}$, which traces the path ${\cal R}_{41}\rightarrow{\cal R}_{31}\rightarrow{\cal R}_{22}$. With this process, the parts of the products in the bracket of (30) is calculated explicitly in (31). While $\sigma_{c,nk}^{2}$ in
3 , i.e., $\sigma_{c,22}^{2}$ is derived as

[TABLE]

The remaining of (30) can be obtained similarly, so a complete expansion of (30) is not detailed for the sake of brevity.

We are now ready to calculate the optimized computing precision of the previous arithmetic operations. Extract parts without $x_{nk}$ and rewrite ${\partial G_{N}}/{\partial x_{nk}}\triangleq G_{\sigma,nk}\varepsilon^{-2x_{nk}}+G_{o}o_{u}^{(-1)}$, where $G_{\sigma,nk}$ and $G_{o}$ do not contain the term $x_{nk}$. The calculations of the optimized computing precision using back propagation is presented in Theorem 2.

Theorem 2**.**

For any ${\cal R}_{nk}$, if ${G_{\sigma,nk}}$, ${G_{o}}$ and $x_{nk}^{\rm{opt}}$ are acknowledged, then for the next arithmetic ${\cal R}_{(n+1)k^{\prime}}$, we have

[TABLE]

*where $\mathrm{LUT}_{x^{\mathrm{opt}}}\left(G_{\sigma,(n+1)k^{\prime}}/G_{o},u\right)$ is a look up table (LUT) which returns $x_{(n+1)k^{\prime}}^{\mathrm{opt}}$ given $G_{\sigma,(n+1)k^{\prime}}/G_{o}$ and the type of arithmetic $u$. *

Proof: By the definition given in Theorem 2, for $\mathcal{R}_{(n+1)k^{\prime}}$ we have

[TABLE]

Comparing $G_{\sigma,nk}$ and $G_{\sigma,\left(n+1\right)k^{\prime}}$, it follows

[TABLE]

where $\left(\text{a}\right)$ follows that both $\sigma_{c,\left(n+1\right)k^{\prime}}^{2}$ and $\sigma_{c,nk}^{2}$ are much smaller than 1, and $\left(\text{b}\right)$ follows that $r\left(x_{\left(n+1\right)k^{\prime}}\right)^{2}\sigma_{W}^{2}$ is much smaller than 1. Then, from (43), (40) is derived.

Meanwhile, to obtain the optimal $x_{nk}$, let $\partial G_{N}/\partial x_{nk}=0$ and denote

[TABLE]

Since $x_{nk}$ is discrete and $f_{u}\left(x_{nk}\right)$ is strictly monotonically increasing, denote the optimal $x_{nk}$ by $x_{nk}^{\text{opt}}$, a look-up table (LUT) between ${G_{\sigma,nk}}/{G_{o}}$, $u$ and $x_{nk}^{\text{opt}}$ can be established, denoted by $x_{nk}^{\text{opt}}=\text{LUT}_{x^{\text{opt}}}\left({G_{\sigma,nk}}/{G_{o}},u\right)$. Then, the LUT for $x_{(n+1)k^{\prime}}^{\mathrm{opt}}$ in (41) is obtained $\hfill\square$

Since ${\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}$ depends on the operands of the arithmetic operation, which are unknown to the back propagation as the arithmetic operations have not yet been calculated, we approximate ${\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}$ by its expectation $\mathbb{E}\left\{{\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}\right\}$. In this manner, with the optimal computing precision of the last arithmetic operations, the optimized computing precision for all the arithmetic operations can be calculated through back propagation according to Theorem 2. In this method, the optimized computing precision for all the arithmetic operations is obtained before the execution of the algorithm. We refer to this method as Offline VPC.

On the other hand, we can alternatively perform a forward propagation instead of backward propagation, obtaining the optimized computing precision of each arithmetic operation during its calculation. In this way, the operands for each arithmetic operation are precisely known. Theoretically, this approach can achieve a better trade-off result than offline VPC. Since the optimal computing precision is calculated while the execution of the algorithm, we refer to this method as Online VPC. In the following, we develop the procedures and algorithms for offline VPC and online VPC, respectively.

IV-B Offline VPC

Since for multiplication, division, and square root, ${\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}$ does not depend on its operands, we only need to calculate the expectation of ${\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}$ for addition and subtraction that leads to the following lemma.

Lemma 3**.**

The average error of the full-precision arithmetic of a one-step addition or subtraction is

[TABLE]

*where $e_{b}$ is the bit width of the exponent of the floating point. *

Proof: First, we consider the expectation of ${\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}$ for addition. Since the addition between positive operand $x$ and negative operand $y$ is equivalent to the subtraction between two positive operands $x$ and $-y$, without loss of generality, we only consider the addition with two positive operands.

Suppose that the two operands are $X$ and $Y$, which both uniformly distribute in $\left[{\cal R}_{\text{min}},{\cal R}_{\text{max}}\right]$, where ${\cal R}_{\text{min}}$ and ${\cal R}_{\text{max}}$ are the smallest and largest positive numbers that can be stored. Denote $Z=Y/X$, then

[TABLE]

Even though $Z$ is discrete in theory, it can be treated as continuous because the density is very fine. For $Z=Y/X$, the PDF of $Z$ is

[TABLE]

The region of the integral in (49) is

[TABLE]

According to the range of $z$, the range of $x$ is

[TABLE]

Then, when $1\leq z\leq\frac{{\cal R}_{\text{max}}}{{\cal R}_{\text{min}}}$, we have

[TABLE]

the remaining part can be obtained similarly. To conclude

[TABLE]

From the definition of floating points[13], ${\cal R}_{\max}/{\cal R}_{\min}=2^{2^{e_{b}}}$, where $e_{b}$ is the bit width of the exponent of the floating point, therefore the expectation of $Z$ is derived as

[TABLE]

where $\left(\text{a}\right)$ follows that ${\cal R}_{\max}\gg{\cal R}_{\min}$.

The derivation of the mean of $Z^{2}$ is written as

[TABLE]

highlighting that $\mathbb{E}\left[Z^{2}\right]$ grows exponentially with $e_{b}$.

By substituting (54) and (55) into (48), we have

[TABLE]

referring addition raises the demand for computing precision.

Considering subtraction, similar to addition, we have

[TABLE]

The PDF of $Z$ is the same with the one of addition. However, when two operands of subtraction are equal, the relative error of the result tends to infinity and becomes meaningless. Therefore, the domain of $Z$ near 1 needs to be carefully removed. Considering $Z$ is discrete, the domain of $Z$ is

[TABLE]

where $f_{b}$ is the bit width of the effective number of the floating point, and $J$ is a random variable uniformly distributed within ${0,1,2,\cdots,2^{f_{b}}-1}$. Since the removed domain of $Z$ is sufficiently small, the PDF of $Z$ remains effective. In this way, the expectation of $Z$ is derived in (LABEL:-5), where $\alpha=\frac{2^{-f_{b}}}{1+J2^{-f_{b}}}$. Meanwhile, we have

[TABLE]

where $\left(a\right)$ and $\left(b\right)$ hold true when $f_{b}$ is sufficiently large. By substituting (60) and (61) into (LABEL:-5), we have

[TABLE]

Since $\mathbb{E}\left[Z\right]>0$, we arrive at $\mathbb{E}\left[{\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}\right]<1$, which means subtraction can always lower the demand for computing precision. $\hfill\square$

We conclude the expectation of the number of additions and subtractions needed for a one-bit change in $x^{\text{opt}}$ in Table IV with common configurations applied in the standard of IEEE-754[13]. It is worth mentioning that it takes hundreds of additions and subtractions to trigger a one-bit change in computing precision for IEEE-754 double precision. This indicates that the expectation given in Lemma 3 exerts a marginal impact on optimality, due to the law of large number (LLN).

Algorithm 1 concludes the proposed offline VPC, where

[TABLE]

Note that Algorithm 1 is generic which only gives the Pareto boundary between average computing bit-width and computing performance (in terms of wireless communication metric, e.g., average sum-rate). Therefore, Algorithm 1 does not need utility function $G_{N}$.

With (68), we have two remarks as following.

Remark 3**.**

*In the procedure of AL-VPC, addition and square root demand higher computing precision, multiplication and division maintain the computing precision of the preceding step, while subtraction demands lower computing precision from an expectation standpoint. *

Remark 4**.**

*The objective of VPC is maintaining the precision of the preceding step rather than the target one. In general, the computing precision tends to decrease progressively. *

IV-C Online VPC Design

With the online VPC method, the main idea is to exploit forward propagation instead of backward propagation to obtain the exact value of ${\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}$. This change requires additional steps in the procedure. The general procedure of online VPC is divided into three main steps. We take Fig. 3 as an illustrative example.

Obtain the initial computing precision for each arithmetic operation in the first step, i.e., $x_{11}$ and $x_{12}$ in Fig. 2. It is worth noting that only those arithmetic operations whose operands are both initial input numbers need to be considered, as such, $x_{22}$ is not included. 2. 2.

Calculate the computing precision for the next arithmetic operation based on the current one, i.e., calculate $x_{21}$ based on $x_{11}$. 3. 3.

Determine the final computing precision for the next arithmetic operation. Since $x_{11}$ and $x_{12}$ have calculated their own “$x_{21}$”, a decision on the final $x_{21}$ needs to be made based on these two results.

The computing precision for all arithmetic operations in the algorithm are obtained by iterating these three steps. In the following parts, we describe them one by one.

IV-C1 Step 1: Speculation for initial $x_{1k}^{\rm{opt}}$

We derive the initial computing precision for each initial arithmetic operation such that the assumption made in Step 2 can be justified.

Since the performance of the algorithm is directly related to $\sigma_{N1}^{2},\cdots,\sigma_{Nk_{N}}^{2}$, $x_{1k}^{\text{opt}},k=1,2,\cdots,k_{0}$ could be derived by back propagation exploiting the recursion model in (68) and (41). With similar techniques as in offline VPC, we adopt the back propagation method with approximation in Lemma 3 to obtain the initial computing precision.

Exploiting Table IV, an LUT between the number of additions and subtractions $N_{\text{a\&s}}$ and the bit differences between the computing precision of the first arithmetic and last arithmetic $x_{d}$ is established as $x_{d}=\text{LUT}_{x_{d}}\left(N_{\text{a\&s}}\right)$.

IV-C2 Step 2: Forward propagation

Once the computing precision for the previous arithmetic operation been obtained, we calculate the computing precision for the current arithmetic operation based on that. The general procedure is similar to the one in Theorem 2, but in reverse order.

IV-C3 Step 3: Rule for handling with different $x_{nk}^{\rm{opt}}$s

If an arithmetic operation involves two operands, each operand will generate its own $x_{nk}^{\text{opt}}$ according to the proposed recursion model in (68) and (41). Denote $G_{\sigma,nk}$ of two operands by $G_{\sigma,nk,1}$ and $G_{\sigma,nk,2}$, then $G_{\sigma,nk}$ is a weighted sum of $G_{\sigma,nk,1}$ and $G_{\sigma,nk,2}$. For addition and subtraction, it follows

[TABLE]

where $a$ and $b$ are two operands, respectively. For multiplication and division, it is

[TABLE]

With the above three steps, we are ready to describe the algorithm of online VPC to solve (7) in Algorithm 2. With a similar method given in Algorithm 1, a Pareto boundary of online VPC can also be obtained. Since Algorithm 2 decides the precision of each arithmetic operations during its execution, an increase in complexity is unavoidable, which is also confirmed theoretically in the following Corollary.

Corollary 1**.**

*Under some mild conditions, the additional complexity introduced by online VPC is negligible. *

Proof: Step 1 start with the calculation of ${\partial\sigma_{t,nk}^{2}}/{\partial\sigma_{c,(n+1)k^{\prime}}^{2}}$. For multiplication, division, and square root, the results are fixed, so there is no added complexity. For addition and subtraction, since the differences between two nearby $G_{\sigma,(n+1)k^{\prime}}/G_{o}$ in $\text{LUT}_{x^{\text{opt}}}$ is $\varepsilon^{2}$ (4 for binary case), the results are approximated using just the exponents of the operands as

[TABLE]

where $E_{a}=\lfloor\log_{\varepsilon}a\rfloor$ is the exponent of $a$, similar for $E_{b}$. It is worth mentioning when $E_{a}=E_{b}$, the approximation is invalid especially for subtraction. When the approximation is valid, $x_{\left(n+1\right)k^{\prime}}^{\text{opt}}$ can be approximated as

[TABLE]

Coincidentally, $E_{a}-\text{max}\left\{E_{a},E_{b}\right\}$ is an existing intermediate result of the realization of arithmetics of addition and subtraction, so the add-on complexity of Step 1 is nearly negligible.

For Step 3, though the computation of $G_{\sigma,nk}$ is inevitable, the precision could be set very low. The choice of $G_{\sigma,nk}$ of in Step 3 for each arithmetic operation is shown in Fig. 4. For addition and subtraction, when $E_{a}$ and $E_{b}$ differ greatly, then

[TABLE]

When $E_{a}$ and $E_{b}$ are close in terms of value, it is appropriate to choose any one or take the arithmetic mean of $G_{\sigma,nk,1}$ and $G_{\sigma,nk,2}$. For multiplication and division, when $G_{\sigma,nk,1}$ and $G_{\sigma,nk,2}$. significantly differ from each other, which is not common in practice, it is better to assign to the larger one to achieve higher precision for robustness. Overall, the added complexity of Step 3 is also negligible.

To conclude, with proper approximation, the added complexity of Algorithm 2 is negligible. $\hfill\square$

In addition, thanks to the forward propagation, Online VPC eliminates the need for the computation graph in advance, which means it supports algorithms with loops and branches. However, in case of algorithms with loops and branches, the initial computing precision can only be arbitrarily determined as it can not be calculated with step 1 anymore. Fortunately, this step primarily influences the precision-complexity trade-off, without affecting the effectiveness of Online VPC.

V Case Study on MIMO Precoding Calculation

In this section, we evaluate the performance of AL-VPC with numerical simulations. Since the optimization in (7) of AL-VPC involves multiple objectives, without loss of generality, we present the Pareto boundary in terms of computing precision and computational complexity. In the following, we focus on a case study of zero-forcing (ZF) precoding[20]. We employ the eBFP storage scheme with $F=1$ to maximum the potential of AL-VPC, $E=10$ to prevent overflow or underflow, and $N=x+1$ which corresponds to the precision of each number. We utilized 100 channel matrices for every point (each computing precision), and these channel matrices remained constant across all points to ensure equivalence between each computing precision. In addition, we only consider the bit width of the mantissa, while the bit width of the exponent is not included.

V-A Sum Rate Analysis

Fig. 5 considers a communication system with $N_{T}=8$ transmit antennas and $K=8$ users each with $N_{R}=1$ receive antenna. The signal-to-noise ratio (SNR), which is defined as the ratio between the total transmit power and channel noise power, is set to 10 dB. The average computing precision is defined as the weighted average computing precision with each basic arithmetic operation. The weight for addition, subtraction, multiplication, division, and square root is 1:1:30:30:80, respectively, based on their time complexity, for both the eBFP design and the IEEE-754 standard. In this case, the value of $G_{o}$ matches accordingly. The figure illustrates the performance comparison of the sum rate of ZF precoding with different computing schemes, where we also try random large-scale solutions to (7) by separating the computation of ZF precoding into three parts as

[TABLE]

The first and third parts are matrix multiplication, the second part is matrix inversion. Each of these parts is calculated using distinct randomly chosen computing precision. In general, both AL-VPC schemes exhibit superior trade-off capabilities compared to the large-scale solution and fixed-length computing. In addition, the performance gaps between the schemes are more pronounced at lower computing precision levels, as all schemes converge to their best performance at high precision levels. For instance, when considering an average computing precision of 9 bits, the online VPC demonstrates a significant performance gain of nearly 60% compared to fixed-length computing, while the offline VPC achieves an approximate 50% improvement. From the perspective of complexity, the online VPC consistently requires approximately 10% fewer bits for computation than fixed-length computing does. Meanwhile, the offline VPC demonstrates an approximately 8% reduction in bit usage in the low-precision range. However, this advantage diminishes in the high-precision range.

Fig. 6 illustrates the computing precision of each arithmetic operation of one iteration of the point labeled in Fig. 5. The algorithm consists 20168 basic arithmetic operations with computing precision ranging from 10 bits to 15 bits. Upon closer examination, the computing precision of the majority of arithmetic operations falls within the range from 11 bits to 14 bits, indicating a relatively small range. Furthermore, multiplications tend to utilize relatively low computing precision, whereas additions tend to employ relatively high computing precision. This result corresponds to the Remark 3 in the previous section.

Performance and complexity comparison of the proposed AL-VPC and fixed length computing in different scenarios are presented in Fig. 7 at the top of the next page. For all the subfigures, we deliberately select the computing precision that maximizes the performance gap, and fixed-length computing employs the same average computing precision as the Online and Offline VPC. Specific choices of the average computing precision values are provided in Table V. Firstly, when considering the influence of SNR, we set $N_{T}=8,K=8,$ and $N_{R}=1$. It is evident that both the online VPC and offline VPC consistently outperform the fixed-length computing. On average, the online VPC achieves a superior performance of 29% compared to the fixed-length computing, while the offline VPC exhibits an average improvement of 19%. Secondly, when examining the impact of antenna array scale, we set $\text{SNR}=10\,\text{dB}$, where a larger performance gap is observed between the online VPC, offline VPC, and fixed-length computing. This can be attributed to the fact that the computation steps increase proportionally with the scale of the antenna array. Lastly, when considering the symmetry of the antenna array, we set $N_{T}=16,\text{SNR}=20\,\text{dB},$ and $N_{R}=1$. The advantage of the AL-VPC techniques becomes more pronounced as the antenna array becomes more symmetric. This is due to the fact that a more symmetric array requires a larger number of computation steps.

V-B BER Comparison

The BER performance of the proposed AL-VPC is compared with that of fixed-length computing. It is worth noting that AL-VPC is only applied to precoding, while decoding still uses IEEE-754 64 bits for fair comparison.

Fig. 8 shows the comparison of BER performance between VPC and fixed-length computing. Regardless of the computing precision, AL-VPC achieves better BER compared to fixed-length computing. When the computing precision is relatively low, although the BER performance of both AL-VPC and fixed-length computing converge as the computing error takes over channel noise, the BER of AL-VPC converges to a lower rate, indicate of AL-VPC’s lower computing error.

VI Conclusion

In this paper, we investigated the trade-off between computing performance and computational complexity in MIMO signal processing when employing AL-VPC. We proposed the framework of AL-VPC and formulated two optimization problems to trade-off computing performance and complexity. The arithmetic propagation error was first derived to characterize the relationship between the computing precision and the variance of the computing error. Then, we solved the optimization problem with online VPC and offline VPC. Through comprehensive numerical analyses, it becomes evident that the proposed AL-VPC offers a substantial advantage over conventional fixed-length computing, in terms of both computing performance and complexity. To further characterize hardware-specific features of in-memory computing, such as nonlinear variations, the error propagation analysis can be refined accordingly. In addition, the versatile nature of AL-VPC exhibits potential applicability across diverse domains, e.g., MMSE detection and hybrid precoding, that demand heightened performance while adhering to stringent complexity constraints.

Appendix A An Introduction of eBFP

Existing data storage techniques, e.g., half-precision and single precision arithmetic, present significant limitations that render them unsuitable for AL-VPC adoption. For instance, fixed-point storage suffers from a critical constraint on the range of representable numbers, leading to an increased risk of overflow. Similarly, traditional floating-point storage methods, such as the IEEE-754 standard [1], offer only limited choices that are insufficient to support AL-VPC. This IEEE-754 standard encompasses four options: half precision (16 bits), single precision (32 bits), double precision (64 bits), and quadruple precision (128 bits). The limited range of options causes an inflexible trade-off between computing precision and complexity. To address this issue, it is imperative to design a novel floating-point arithmetic, termed extended block floating-point (eBFP) in our study.

To clarify, it is cruicial to distinguish eBFP from the traditional block floating-point (BFP) systems. Unlike BFP, which involves segmenting the floating bits of the IEEE-754 standard, the proposed eBFP presents a distinct approach to floating-point arithmetic. BFP operates exploiting a block storage scheme aimed at reducing storage complexity by assigning a shared exponent block to numbers of similar scale. This storage structure comprises two components: the exponent block, containing the shared sign and exponent bits for all numbers, and multiple floating blocks, each storing the floating bits associated with a specific number.

Fig. 9 presents a schematic comparison between BFP and IEEE-754. For ease of understanding, we adopt a representation with an exponent bit width of 4 and a floating bit width of 5, which is however not explicitly defined in IEEE-754. BFP, as illustrated, extracts common exponent bits and delineates the floating bits for three numbers. It is important to note that BFP does not specify the exact number of exponent and floating bits. Consequently, in practice, the “shape” formed by BFP may not necessarily resemble the “rectangle” depicted in Fig. 9, but rather an irregular form. Compared to IEEE-754, which requires 30 bits of storage, BFP utilizes only 20 bits, resulting in significant savings in storage.

Unlike traditional BFP, which stores multiple numbers, each instance of eBFP is designed to accommodate only a single number. Instead of storing the exponent corresponding to scientific notation, the exponent bits in eBFP represent the “serial number” of the block containing the highest bit. To enhance the flexibility of eBFP, both the number of bits and the sizes of the exponent block and fraction blocks can be adjusted according to specific requirements.

Algorithm R.1 outlines the conversion process from high-precision decimal numbers to eBFP. Notably, certain special cases, such as underflow and overflow, are not addressed. To elaborate on the conversion process, we offer a straightforward demonstration. As depicted in Fig. 1, assuming the number is represented by a fixed point with the highest digit 57 digits before the decimal point, while parameters for the storage range and precision are respectively set as $E=F=8$ and $N=3$. In eBFP, the serial number of the first block (8 bits) to the left of the decimal point is designated as No. 0, with subsequent blocks incrementing to the left and decrementing to the right. Given that the highest bit of the number resides in the block No. 7, the corresponding exponent bit is set to 7. For fraction blocks, the first block is the block where the highest bit resides. If the number of bits in the initial fraction block is fewer than 8, 0’s are appended until it reaches 8 bits. Subsequently, based on the specified number of eBFP blocks ($N=3$), blocks with lower serial numbers are sequentially filled. Because the bit after block No. 6 is 0, with round to the nearest, no carry is needed. Therefore the fraction block 1 is block No. 7, and the fraction block 2 is block No. 6.

When setting $E=F=8$ in eBFP, the range of representable numbers expands by 8 times compared to traditional floating-point, achieved by altering the representation of exponent bits. Specifically, 7 bits are utilized to represent a range equivalent to what 10 bits would represent in IEEE-754. This storage range comes close to the storage range (11 bits) covered by IEEE-754 double-precision floating-point (64 bits). However, this method may lead to the presence of a “0” in the first floating block. While this “0” only encodes the specific position of the highest bit in the block, carrying merely 3 bits of information, it occupies an expected space of 3.5 bits, resulting in a loss of 0.5 bit of information. In addition, IEEE-754 can omit the first bit by employing scientific notation, while eBFP changes the meaning of the exponent bits and cannot omit the first bit. In summary, these three factors suggest that the fraction of eBFP achieves precision flexibility at the cost of 1.5 bits compared to IEEE-754.

Compared to the standard IEEE-754, eBFP maintains a consistent width for the exponent regardless of the number of blocks, ensuring that the range of representable numbers remains unchanged. This feature aligns well with practical needs, as precision control often necessitates maintaining a consistent representation range. With IEEE-754, transitioning to a low-precision representation requires careful consideration of potential underflow and overflow scenarios, posing challenges in designing large numbers with reduced precision. In contrast, eBFP enables precision adjustments without altering the representation range. The precision of eBFP is determined by the number of blocks, offering finer control over precision adjustment compared to IEEE-754. Crucially, each eBFP block holds a specific physical significance, facilitating storage and calculations at the block level. In contrast, IEEE-754 lacks such granularity and cannot perform calculations with reduced bit width beyond division into sign bits, exponent bits, and floating bits.