A 28nm 1.80Mb/mm2 Digital/Analog Hybrid SRAM-CIM Macro Using 2D-Weighted Capacitor Array for Complex Number Mac Operations

TL;DR

This paper presents a high-density 28nm hybrid SRAM-CIM macro that efficiently performs complex number MAC operations using a novel 2D-weighted capacitor array, achieving high accuracy and reduced latency.

Contribution

Introduction of a 2D-weighted capacitor array enabling a hybrid digital-analog CIM macro for complex number operations with improved accuracy and area efficiency.

Findings

Achieved 1.80 Mb/mm2 memory density.

Real and imaginary parts computed with a single conversion.

0.435% RMS error in complex MAC operations.

Abstract

A 28nm dense 6T-SRAM Digital(D)/Analog(A) Hybrid compute-in-memory (CIM) macro supporting complex num-ber MAC operation is presented. By introducing a 2D-weighted Capacitor Array, a hybrid configuration is adopted where digital CIM is applied only to the upper bits and ana-log CIM is applied to the rest, without the need for input DACs resulting in improved accuracy and lower area overhead. The CIM prototype macro achieves 1.80 Mb/mm2 memory density and 0.435% RMS error. Complex CIM unit outputs real and imaginary part with a single conversion to reduce latency.