MAHL: Multi-Agent LLM-Guided Hierarchical Chiplet Design with Adaptive Debugging

TL;DR

MAHL is a hierarchical multi-agent framework leveraging LLMs for efficient, accurate, and optimized chiplet design, addressing challenges in validation, parameter tuning, and design complexity in AI hardware development.

Contribution

The paper introduces MAHL, a novel multi-agent LLM-guided hierarchical framework for chiplet design that improves accuracy and optimization in hardware generation tasks.

Findings

Significantly improves RTL design generation accuracy.

Increases real-world chiplet design Pass@5 accuracy from 0 to 0.72.

Achieves comparable or better PPA results than state-of-the-art methods.

Abstract

As program workloads (e.g., AI) increase in size and algorithmic complexity, the primary challenge lies in their high dimensionality, encompassing computing cores, array sizes, and memory hierarchies. To overcome these obstacles, innovative approaches are required. Agile chip design has already benefited from machine learning integration at various stages, including logic synthesis, placement, and routing. With Large Language Models (LLMs) recently demonstrating impressive proficiency in Hardware Description Language (HDL) generation, it is promising to extend their abilities to 2.5D integration, an advanced technique that saves area overhead and development costs. However, LLM-driven chiplet design faces challenges such as flatten design, high validation cost and imprecise parameter optimization, which limit its chiplet design capability. To address this, we propose MAHL, a hierarchical LLM-based chiplet design generation framework that features six agents which collaboratively enable AI algorithm-hardware mapping, including hierarchical description generation, retrieval-augmented code generation, diverseflow-based validation, and multi-granularity design space exploration. These components together enhance the efficient generation of chiplet design with optimized Power, Performance and Area (PPA). Experiments show that MAHL not only significantly improves the generation accuracy of simple RTL design, but also increases the generation accuracy of real-world chiplet design, evaluated by Pass@5, from 0 to 0.72 compared to conventional LLMs under the best-case scenario. Compared to state-of-the-art CLARIE (expert-based), MAHL achieves comparable or even superior PPA results under certain optimization objectives.