IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons

TL;DR

This paper introduces IzhiRISC-V, a RISC-V processor with a custom ISA extension designed to efficiently process Spiking Neural Networks using Izhikevich neurons, aiming to improve energy efficiency and processing speed.

Contribution

The paper presents the design and implementation of a RISC-V-based processor with a novel neuromorphic ISA extension tailored for spiking neuron processing.

Findings

First step towards large-scale neuromorphic system

Supports custom neuromorphic ISA extension

Potential for high energy efficiency in SNN processing

Abstract

Spiking Neural Network processing promises to provide high energy efficiency due to the sparsity of the spiking events. However, when realized on general-purpose hardware -- such as a RISC-V processor -- this promise can be undermined and overshadowed by the inefficient code, stemming from repeated usage of basic instructions for updating all the neurons in the network. One of the possible solutions to this issue is the introduction of a custom ISA extension with neuromorphic instructions for spiking neuron updating, and realizing those instructions in bespoke hardware expansion to the existing ALU. In this paper, we present the first step towards realizing a large-scale system based on the RISC-V-compliant processor called IzhiRISC-V, supporting the custom neuromorphic ISA extension.