AutoPower: Automated Few-Shot Architecture-Level Power Modeling by Power Group Decoupling
Qijun Zhang, Yao Lu, Mengming Li, Zhiyao Xie

TL;DR
AutoPower introduces an automated, architecture-level power modeling method that effectively decouples power groups, achieving high accuracy with minimal training data, significantly improving early-stage power estimation for CPU design.
Contribution
AutoPower presents a novel power group decoupling approach enabling accurate power modeling with limited known configurations, reducing data requirements compared to existing ML-based models.
Findings
Achieves 4.36% MAPE with only two training configurations.
Outperforms McPAT-Calib by 5% in MAPE and 0.09 in R^2.
Effectively models power consumption focusing on clock and SRAM groups.
Abstract
Power efficiency is a critical design objective in modern CPU design. Architects need a fast yet accurate architecture-level power evaluation tool to perform early-stage power estimation. However, traditional analytical architecture-level power models are inaccurate. The recently proposed machine learning (ML)-based architecture-level power model requires sufficient data from known configurations for training, making it unrealistic. In this work, we propose AutoPower targeting fully automated architecture-level power modeling with limited known design configurations. We have two key observations: (1) The clock and SRAM dominate the power consumption of the processor, and (2) The clock and SRAM power correlate with structural information available at the architecture level. Based on these two observations, we propose the power group decoupling in AutoPower. First, AutoPower decouples…
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Taxonomy
TopicsLow-power high-performance VLSI design · Embedded Systems Design Techniques · Parallel Computing and Optimization Techniques
