Real-time CARFAC Cochlea Model Acceleration on FPGA for Underwater Acoustic Sensing Systems

TL;DR

This paper develops a real-time, energy-efficient FPGA-based CARFAC cochlea model system for underwater acoustic sensing, demonstrating improved scalability, speed, and low power consumption on an embedded platform.

Contribution

It introduces a hardware-accelerated CARFAC implementation on FPGA integrated with a Rust-based software framework on an embedded SoM, enabling real-time underwater sound analysis.

Findings

Achieved 13.5% hardware utilization for 64-channel CARFAC

Processed 256 kHz signals in real time with 3.11 W power consumption

Enhanced scalability and efficiency over prior CARFAC implementations

Abstract

This paper presents a real-time, energy-efficient embedded system implementing an array of Cascade of Asymmetric Resonators with Fast-Acting Compression (CARFAC) cochlea models for underwater sound analysis. Built on the AMD Kria KV260 System-on-Module (SoM), the system integrates a Rust-based software framework on the processor for real-time interfacing and synchronization with multiple hydrophone inputs, and a hardware-accelerated implementation of the CARFAC models on a Field-Programmable Gate Array (FPGA) for real-time sound pre-processing. Compared to prior work, the CARFAC accelerator achieves improved scalability and processing speed while reducing resource usage through optimized time-multiplexing, pipelined design, and elimination of costly division circuits. Experimental results demonstrate 13.5% hardware utilization for a single 64-channel CARFAC instance and a whole board power consumption of 3.11 W when processing a 256 kHz input signal in real time.