A Multi-Agent Generative AI Framework for IC Module-Level Verification Automation
Wenbo Liu, Forbes Hou, Jon Zhang, Hong Liu, Allen Lei

TL;DR
This paper introduces a multi-agent AI framework that automates chip verification tasks, significantly improving over traditional methods and single-agent AI approaches in generating verification documents and testbenches.
Contribution
The paper presents a novel multi-agent framework that automates complex verification processes in chip design, addressing limitations of existing single-agent AI methods.
Findings
MAVF outperforms manual methods in verification tasks
MAVF surpasses single-dialogue AI in accuracy and efficiency
Framework effectively handles complex chip modules
Abstract
As large language models demonstrate enormous potential in the field of Electronic Design Automation (EDA), generative AI-assisted chip design is attracting widespread attention from academia and industry. Although these technologies have made preliminary progress in tasks such as code generation, their application in chip verification -- a critical bottleneck in the chip development cycle -- remains at an exploratory stage. This paper proposes an innovative Multi-Agent Verification Framework (MAVF) aimed at addressing the limitations of current single-LLM approaches in complex verification tasks. Our framework builds an automated transformation system from design specifications to testbench through the collaborative work of multiple specialized agents, including specification parsing, verification strategy generation, and code implementation. Through verification experiments on…
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