Efficient Memristive Spiking Neural Networks Architecture with Supervised In-Situ STDP Method

TL;DR

This paper introduces a memristor-based spiking neural network architecture with a novel supervised in-situ STDP learning algorithm, achieving high accuracy and robustness for pattern recognition and classification tasks without external control hardware.

Contribution

It presents a scalable, efficient memristive SNN architecture with a new supervised in-situ STDP training method that improves training efficiency and hardware simplicity.

Findings

Achieved 99.11% accuracy on Iris dataset

Maintained 93.4% recognition under 20% input noise

Demonstrated robustness to device variations

Abstract

Memristor-based Spiking Neural Networks (SNNs) with temporal spike encoding enable ultra-low-energy computation, making them ideal for battery-powered intelligent devices. This paper presents a circuit-level memristive spiking neural network (SNN) architecture trained using a proposed novel supervised in-situ learning algorithm inspired by spike-timing-dependent plasticity (STDP). The proposed architecture efficiently implements lateral inhibition and the refractory period, eliminating the need for external microcontrollers or ancillary control hardware. All synapses of the winning neurons are updated in parallel, enhancing training efficiency. The modular design ensures scalability with respect to input data dimensions and output class count. The SNN is evaluated in LTspice for pattern recognition (using 5x3 binary images) and classification tasks using the Iris and Breast Cancer Wisconsin (BCW) datasets. During testing, the system achieved perfect pattern recognition and high classification accuracies of 99.11\% (Iris) and 97.9\% (BCW). Additionally, it has demonstrated robustness, maintaining an average recognition rate of 93.4\% under 20\% input noise. The impact of stuck-at-conductance faults and memristor device variations was also analyzed.