Quantum Circuit Caches and Compressors for Low Latency, High Throughput Computing

TL;DR

This paper introduces quantum circuit caches and compressors to reduce latency and memory usage in executing large-scale quantum programs, enabling more efficient real-time quantum computing.

Contribution

It proposes the use of high-level quantum circuit caches and compressors, demonstrating significant latency reductions for large quantum circuits.

Findings

Caches and compressors can reduce transpilation latency by five orders of magnitude.

High-level representations improve memory efficiency for large quantum programs.

Numerical evidence supports the effectiveness of the proposed methods.

Abstract

Utility-scale quantum programs contain operations on the order of $>10^{15}$ which must be prepared and piped from a classical co-processor to the control unit of the quantum device. The latency of this process significantly increases with the size of the program: existing high-level classical representations of quantum programs are typically memory intensive and do not na\"ively efficiently scale to the degree required to execute utility-scale programs in real-time. To combat this limitation, we propose the utilization of high-level quantum circuit caches and compressors. The first save on the time associated with repetitive tasks and sub-circuits, and the latter are useful for representing the programs/circuits in memory-efficient formats. We present numerical evidence that caches and compressors can offer five orders of magnitude lower latencies during the automatic transpilation of extremely large quantum circuits.