A Fast Parallel Median Filtering Algorithm Using Hierarchical Tiling

TL;DR

This paper presents a novel hierarchical tiling algorithm for median filtering that significantly improves speed and scalability, enabling real-time noise removal in digital images on GPUs.

Contribution

It introduces two new variants of median filtering algorithms with unprecedented per-pixel complexity, achieving up to 5x faster performance on GPUs compared to existing methods.

Findings

Achieves per-pixel complexity of O(k log k) and O(k) for two variants.

Up to 5 times faster than current state-of-the-art GPU median filters.

Effective for kernels up to 75x75 pixels across various data types.

Abstract

Median filtering is a non-linear smoothing technique widely used in digital image processing to remove noise while retaining sharp edges. It is particularly well suited to removing outliers (impulse noise) or granular artifacts (speckle noise). However, the high computational cost of median filtering can be prohibitive. Sorting-based algorithms excel with small kernels but scale poorly with increasing kernel diameter, in contrast to constant-time methods characterized by higher constant factors but better scalability, such as histogram-based approaches or the 2D wavelet matrix. This paper introduces a novel algorithm, leveraging the separability of the sorting problem through hierarchical tiling to minimize redundant computations. We propose two variants: a data-oblivious selection network that can operate entirely within registers, and a data-aware version utilizing random-access memory. These achieve per-pixel complexities of $O(k \log(k))$ and $O(k)$, respectively, for a $k \times k$ kernel - unprecedented for sorting-based methods. Our CUDA implementation is up to 5 times faster than the current state of the art on a modern GPU and is the fastest median filter in most cases for 8-, 16-, and 32-bit data types and kernels from $3 \times 3$ to $75 \times 75$.