PGR-DRC: Pre-Global Routing DRC Violation Prediction Using Unsupervised Learning
Riadul Islam, Dhandeep Challagundla

TL;DR
This paper introduces an innovative unsupervised machine learning approach for predicting design rule check (DRC) violations in chip layouts, significantly reducing training time and handling unbalanced datasets effectively.
Contribution
It presents the first unsupervised DRC violation prediction model that works with unbalanced data and requires less training time than traditional supervised models.
Findings
Achieved 99.95% prediction accuracy.
Reduced training time by up to 6003x.
Effective on unbalanced datasets.
Abstract
Leveraging artificial intelligence (AI)-driven electronic design and automation (EDA) tools, high-performance computing, and parallelized algorithms are essential for next-generation microprocessor innovation, ensuring continued progress in computing, AI, and semiconductor technology. Machine learning-based design rule checking (DRC) and lithography hotspot detection can improve first-pass silicon success. However, conventional ML and neural network (NN)-based models use supervised learning and require a large balanced dataset (in terms of positive and negative classes) and training time. This research addresses those key challenges by proposing the first-ever unsupervised DRC violation prediction methodology. The proposed model can be built using any unbalanced dataset using only one class and set a threshold for it, then fitting any new data querying if they are within the boundary of…
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Taxonomy
TopicsVLSI and FPGA Design Techniques · Physical Unclonable Functions (PUFs) and Hardware Security · Advancements in Photolithography Techniques
