Low-energy domain wall racetracks with multiferroic topologies

TL;DR

This paper introduces a voltage-controlled, low-energy magnetoelectric racetrack memory using BiFeO3 nanostrips, achieving high domain wall velocities and novel topological textures, promising ultralow-power, high-speed data storage.

Contribution

It demonstrates a room-temperature, voltage-controlled racetrack memory with novel topological magnetic textures and significantly reduced energy dissipation compared to spin-torque devices.

Findings

Domain walls move at km/s velocities

Energy dissipation is orders of magnitude lower

Novel topological magnetic textures observed

Abstract

Conventional racetrack memories move information by pushing magnetic domain walls or other spin textures with spin-polarized currents, but the accompanying Joule heating inflates their energy budget and can hamper scaling. Here we present a voltage-controlled, magnetoelectric racetrack in which transverse electric fields translate coupled ferroelectric-antiferromagnetic walls along BiFeO3 nanostrips at room temperature. Because no charge traverses the track, the switching dissipates orders of magnitude less energy than the most efficient spin-torque devices with more favourable scaling, making the scheme significantly more attractive at the nanoscale. We further uncover noncollinear topological magnetoelectric textures that emerge at domain walls in BiFeO3, where the nature of these topologies influences their stability upon translation. Among these are polar bi-merons and polar vertices magnetoelectrically coupled with magnetic cycloid disclinations and previously unobserved, topological magnetic cycloid twist topologies. We observe domain wall velocities of at least kilometres per second - matching or surpassing the fastest ferrimagnetic and antiferromagnetic racetracks and approaching the acoustic-phonon limit of BiFeO3 - while preserving these topologies over tens of micrometres. The resulting high velocity, low-energy racetrack delivers nanosecond access times without the thermal overhead of current-driven schemes, charting a path toward dense, ultralow-power racetrack devices which rely on spin texture translation.