A mapping of the Min-Sum decoder to reduction operations, and its implementation using CUDA kernels

TL;DR

This paper presents a GPU implementation of the Min-Sum decoder for LDPC codes that is independent of the specific parity matrix content, relying solely on its dimensions, enabling flexible and efficient decoding.

Contribution

It introduces a novel mapping of the Min-Sum decoding algorithm to reduction operations and implements it using CUDA kernels, independent of parity matrix content.

Findings

GPU implementation achieves efficient decoding performance.

Decoding process is flexible due to independence from matrix content.

Potential for broad application across different LDPC code structures.

Abstract

Decoders for Low Density Parity Check (LDPC) codes are usually tailored to an application and optimized once the specific content and structure of the parity matrix are known. In this work we consider the parity matrix as an argument of the Min-Sum decoder, and provide a GPU implementation that is independent of the content of the parity matrix, and relies only on its dimensions.