Efficient Triple Modular Redundancy for Reliability Enhancement of DNNs Using Explainable AI

TL;DR

This paper introduces a selective TMR approach for DNNs that leverages Layer-wise Relevance Propagation to identify and protect critical parameters, significantly improving reliability with minimal overhead.

Contribution

It presents a novel method combining XAI and TMR to efficiently enhance DNN reliability by protecting only the most important weights.

Findings

Achieves over 60% reliability improvement on AlexNet at a bit error rate of 10^-4.

Maintains the same overhead as existing state-of-the-art methods.

Effective on models like VGG16 and AlexNet with datasets MNIST and CIFAR-10.

Abstract

Deep Neural Networks (DNNs) are widely employed in safety-critical domains, where ensuring their reliability is essential. Triple Modular Redundancy (TMR) is an effective technique to enhance the reliability of DNNs in the presence of bit-flip faults. In order to handle the significant overhead of TMR, it is applied selectively on the parameters and components with the highest contribution at the model output. Hence, the accuracy of the selection criterion plays the key role on the efficiency of TMR. This paper presents an efficient TMR approach to enhance the reliability of DNNs against bit-flip faults using an Explainable Artificial Intelligence (XAI) method. Since XAI can provide valuable insights about the importance of individual neurons and weights in the performance of the network, they can be applied as the selection metric in TMR techniques. The proposed method utilizes a low-cost, gradient-based XAI technique known as Layer-wise Relevance Propagation (LRP) to calculate importance scores for DNN parameters. These scores are then used to enhance the reliability of the model, with the most critical weights being protected by TMR. The proposed approach is evaluated on two DNN models, VGG16 and AlexNet, using datasets such as MNIST and CIFAR-10. The results demonstrate that the method can protect the AlexNet model at a bit error rate of 10-4, achieving over 60% reliability improvement while maintaining the same overhead as state-of-the-art methods.