Hardware-Aware Feature Extraction Quantisation for Real-Time Visual Odometry on FPGA Platforms
Mateusz Wasala, Mateusz Smolarczyk, Michal Danilowicz, Tomasz Kryjak

TL;DR
This paper presents a hardware-aware, quantised neural network architecture for real-time visual feature extraction on FPGA, enabling efficient visual odometry with high accuracy and performance in resource-constrained environments.
Contribution
It introduces an FPGA-optimized, quantised SuperPoint-based feature extraction model for visual odometry, combining model compression with hardware-aware design for real-time deployment.
Findings
Achieved 54 fps processing of 640x480 images on FPGA
Outperformed existing solutions in speed and efficiency
Quantisation techniques impact accuracy and performance
Abstract
Accurate position estimation is essential for modern navigation systems deployed in autonomous platforms, including ground vehicles, marine vessels, and aerial drones. In this context, Visual Simultaneous Localisation and Mapping (VSLAM) - which includes Visual Odometry - relies heavily on the reliable extraction of salient feature points from the visual input data. In this work, we propose an embedded implementation of an unsupervised architecture capable of detecting and describing feature points. It is based on a quantised SuperPoint convolutional neural network. Our objective is to minimise the computational demands of the model while preserving high detection quality, thus facilitating efficient deployment on platforms with limited resources, such as mobile or embedded systems. We implemented the solution on an FPGA System-on-Chip (SoC) platform, specifically the AMD/Xilinx Zynq…
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Taxonomy
TopicsRobotics and Sensor-Based Localization · Advanced Image and Video Retrieval Techniques · Advanced Vision and Imaging
