A Method for Optimizing Connections in Differentiable Logic Gate Networks
Wout Mommen, Lars Keuninckx, Matthias Hartmann, Piet Wambacq

TL;DR
This paper presents a new method for optimizing connections in differentiable logic gate networks, leading to more efficient models that outperform fixed-connection networks on standard benchmarks with fewer gates.
Contribution
The authors introduce a partial connection optimization technique for differentiable logic gate networks, improving performance and reducing gate count compared to traditional fixed-connection approaches.
Findings
Optimized LGNs outperform fixed-connection LGNs on benchmarks.
Achieved over 98% accuracy on MNIST with only 8000 gates.
Network with 24 times fewer gates performs better than standard LGNs.
Abstract
We introduce a novel method for partial optimization of the connections in Deep Differentiable Logic Gate Networks (LGNs). Our training method utilizes a probability distribution over a subset of connections per gate input, selecting the connection with highest merit, after which the gate-types are selected. We show that the connection-optimized LGNs outperform standard fixed-connection LGNs on the Yin-Yang, MNIST and Fashion-MNIST benchmarks, while requiring only a fraction of the number of logic gates. When training all connections, we demonstrate that 8000 simple logic gates are sufficient to achieve over 98% on the MNIST data set. Additionally, we show that our network has 24 times fewer gates, while performing better on the MNIST data set compared to standard fully connected LGNs. As such, our work shows a pathway towards fully trainable Boolean logic.
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Taxonomy
TopicsLow-power high-performance VLSI design · VLSI and FPGA Design Techniques · Physical Unclonable Functions (PUFs) and Hardware Security
MethodsSparse Evolutionary Training
