Stannic: Systolic STochAstic ONliNe SchedulIng AcCelerator

TL;DR

Stannic introduces FPGA-assisted hardware accelerators Hercules and Stannic to significantly speed up stochastic workload scheduling in heterogeneous HPC systems, enabling near real-time, efficient resource utilization.

Contribution

The paper presents two novel FPGA-based microarchitectures, Hercules and Stannic, for accelerating stochastic online scheduling in HPC environments, improving speed and efficiency.

Findings

Hercules achieves up to 1060x speedup over software implementation.

Stannic reduces latency by 7.5x and increases system size by 14x.

Schedules produced show efficient utilization and low job latency.

Abstract

Efficient workload scheduling is a critical challenge in modern heterogeneous computing environments, particularly in high-performance computing (HPC) systems. Traditional software-based schedulers struggle to efficiently balance workloads due to scheduling overhead, lack of adaptability to stochastic workloads, and suboptimal resource utilization. The scheduling problem further compounds in the context of shared HPC clusters, where job arrivals and processing times are inherently stochastic. Prediction of these elements is possible, but it introduces additional overhead. To perform this complex scheduling, we developed two FPGA-assisted hardware accelerator microarchitectures, Hercules and Stannic. Hercules adopts a task-centric abstraction of stochastic scheduling, whereas Stannic inherits a schedule-centric abstraction. These hardware-assisted solutions leverage parallelism, pre-calculation, and spatial memory access to significantly accelerate scheduling. We accelerate a non-preemptive stochastic online scheduling algorithm to produce heterogeneity-aware schedules in near real time. With Hercules, we achieved a speedup of up to 1060x over a baseline C/C++ implementation, demonstrating the efficacy of a hardware-assisted acceleration for heterogeneity-aware stochastic scheduling. With Stannic, we further improved efficiency, achieving a 7.5x reduction in latency per computation iteration and a 14x increase in the target heterogeneous system size. Experimental results show that the resulting schedules demonstrate efficient machine utilization and low average job latency in stochastic contexts.