A Mixed-Signal Photonic SRAM-based High-Speed Energy-Efficient Photonic Tensor Core with Novel Electro-Optic ADC
Md Abdullah-Al Kaiser, Sugeet Sunder, Ajey P. Jacob, and Akhilesh R. Jaiswal

TL;DR
This paper introduces a high-speed, energy-efficient photonic tensor core with a novel electro-optic ADC, leveraging integrated photonics for scalable, fast matrix multiplication suitable for AI and IoT applications.
Contribution
It presents a scalable mixed-signal photonic tensor core with a novel electro-optic ADC, achieving high speed and energy efficiency using integrated photonic components.
Findings
Achieves 4.10 TOPS computation speed.
Power efficiency of 3.02 TOPS/W.
Utilizes monolithic 45nm photonic technology.
Abstract
The rapid surge in data generated by Internet of Things (IoT), artificial intelligence (AI), and machine learning (ML) applications demands ultra-fast, scalable, and energy-efficient hardware, as traditional von Neumann architectures face significant latency and power challenges due to data transfer bottlenecks between memory and processing units. Furthermore, conventional electrical memory technologies are increasingly constrained by rising bitline and wordline capacitance, as well as the resistance of compact and long interconnects, as technology scales. In contrast, photonics-based in-memory computing systems offer substantial speed and energy improvements over traditional transistor-based systems, owing to their ultra-fast operating frequencies, low crosstalk, and high data bandwidth. Hence, we present a novel differential photonic SRAM (pSRAM) bitcell-augmented scalable…
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Taxonomy
TopicsNeural Networks and Reservoir Computing · Optical Network Technologies · Photonic and Optical Devices
