Enhanced Fault Ride-Through Grid Forming with Transient Synchronisation Stability and Current Saturation

TL;DR

This paper introduces an advanced current saturation algorithm for grid-forming converters that enhances transient synchronization stability and low-voltage ride-through performance during grid faults, validated through analytical and HIL experiments.

Contribution

It proposes a novel current saturation method using virtual fluxes to improve stability and compliance with grid standards during faults.

Findings

Enhanced transient synchronization stability during faults.

Improved low-voltage ride-through performance.

Validated effectiveness through HIL experiments.

Abstract

During grid faults, grid-forming converters are typically suggested to switch from a voltage-source to a current-source mode to limit the current and protect the electronics. This transition has the potential for the converter to transiently lose synchronization due to such current saturation. Therefore, this paper proposes an alternative current saturation algorithm to improve transient synchronization stability during mode switching. The algorithm is designed for grid-forming converters to meet low-voltage ride-through (LVRT) requirements and grid-fault standards in addition to transient synchronization stability. Moreover, it limits the converter output current during grid faults with a new control parameter. The presented method introduces converter output virtual fluxes to calculate the current references in the d- and q-axes for the current saturation algorithm to enhance LVRT performance and grid stability. The method exploits the correlation between the converter's virtual fluxes and currents to modify the current saturation levels through real-time converter virtual flux estimation. The adaptive saturation levels ensure precise control and high dynamics during grid faults and facilitate optimal power injection or absorption to support the grid. The proposed current-saturation algorithm is analytically evaluated. Further, hardware-in-the-loop (HIL) experiments validate the effectiveness of the proposed algorithm.