Hybrid Single-Pulse and Sawyer-Tower Method for Accurate Transistor Loss Separation in High-Frequency High-Efficiency Power Converters

TL;DR

This paper introduces a hybrid testing method combining single-pulse and Sawyer-Tower techniques to accurately measure transistor switching losses, especially in high-frequency, high-efficiency power converters, improving device characterization.

Contribution

A novel hybrid testing approach that reduces overlap and backflow effects, enabling precise loss separation and better understanding of transistor energy dissipation mechanisms.

Findings

Validated on a 350-W LLC converter

Accurately quantifies switching losses

Applicable to SiC and GaN transistors

Abstract

Accurate measurement of transistor parasitic capacitance and its associated energy losses is critical for evaluating device performance, particularly in high-frequency and high-efficiency power conversion systems. This paper proposes a hybrid single-pulse and Sawyer-Tower test method to analyse switching characteristics of field-effect transistors (FET), which not only eliminates overlap losses but also mitigates the effects of current backflow observed in traditional double-pulse testing. Through a precise loss separation model, it enables an accurate quantification of switching losses and provides a refined understanding of device energy dissipation mechanisms. We validate the hysteresis data and loss separation results through experimental measurements on a 350-W LLC converter, which further offers deeper insights into transistor dynamic behaviour and its dependence on operating conditions. This method is applicable to a wide range of transistors, including emerging SiC and GaN devices, and serves as a valuable tool for device characterization and optimization in power electronics.