Lossless, Non-Volatile Post-Fabrication Trimming of PICs via On-Chip High-Temperature Annealing of Undercut Waveguides
Yating Wu, Haozhe Sun, Bo Xiong, Yalong Yv, Jiale Zhang, Zhaojie Zheng, Wei Ma, and Tao Chu

TL;DR
This paper introduces a novel, CMOS-compatible high-temperature annealing method for permanently trimming photonic integrated circuits, effectively compensating manufacturing deviations with high precision and stability, without additional processing steps.
Contribution
The authors present the first demonstration of a nonvolatile, high-temperature thermal treatment for post-fabrication trimming of PICs that is simple, energy-efficient, and compatible with existing CMOS processes.
Findings
Achieved a permanent refractive index reduction of 0.0173 in silicon waveguides.
Demonstrated high-resolution tuning of up to 5.25 bits across broadband spectrum.
Maintained stability of the trimmed state for over 218 days.
Abstract
Limited by equipment precision, manufacturing deviations in waveguide width, etch depth, and layer thickness inevitably occur in photonic integrated circuits (PICs). These variations cause initial phase errors, compromising the reliability of phase-sensitive devices such as Mach-Zehnder Interferometers (MZI) and microring resonators. To overcome this, we report a nonvolatile, near-lossless post-trimming method utilizing sufficient high-temperature thermal treatment for undercut waveguides, reported here for the first time to the best of our knowledge. This CMOS-compatible approach requires no additional processes or equipment, enables simple electrical heating for trimming, and retains long-term stability after high-temperature removal, ensuring high energy efficiency. Transmission electron microscopy indicates that high-temperature thermal treatment induces irreversible lattice…
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