AMD Versal Implementations of FAM and SSCA Estimators

TL;DR

This paper presents optimized FPGA implementations of FAM and SSCA spectral correlation estimators on AMD Versal, achieving significant speedups and energy efficiency improvements over GPU solutions for real-time cyclostationary analysis.

Contribution

The work introduces high-speed FPGA implementations of FAM and SSCA on AMD Versal, with a generalized parallelization methodology respecting hardware constraints.

Findings

Speedups of 4.43x and 1.90x over GPU for FAM and SSCA.

Energy efficiency improvements of 30.5x and 24.5x.

Supports window sizes up to 2^20 for SSCA.

Abstract

Cyclostationary analysis is widely used in signal processing, particularly in the analysis of human-made signals, and spectral correlation density (SCD) is often used to characterise cyclostationarity. Unfortunately, for real-time applications, even utilising the fast Fourier transform (FFT), the high computational complexity associated with estimating the SCD limits its applicability. In this work, we present optimised, high-speed field-programmable gate array (FPGA) implementations of two SCD estimation techniques. Specifically, we present an implementation of the FFT accumulation method (FAM) running entirely on the AMD Versal AI engine (AIE) array. We also introduce an efficient implementation of the strip spectral correlation analyser (SSCA) that can be used for window sizes up to $2^{20}$. For both techniques, a generalised methodology is presented to parallelise the computation while respecting memory size and data bandwidth constraints. Compared to an NVIDIA GeForce RTX 3090 graphics processing unit (GPU) which uses a similar 7nm technology to our FPGA, for the same accuracy, our FAM/SSCA implementations achieve speedups of 4.43x/1.90x and a 30.5x/24.5x improvement in energy efficiency.