Experimental realization of the bucket-brigade quantum random access memory

TL;DR

This paper demonstrates the first experimental implementation of the bucket-brigade quantum random access memory (QRAM) using superconducting qubits, introducing efficient gate decompositions and error mitigation to improve fidelity and scalability.

Contribution

It presents the first experimental realization of circuit-based bucket-brigade QRAM on superconducting processors, with optimized gate schemes and error mitigation techniques.

Findings

Achieved QRAM query fidelities up to 0.800 and 0.604 for two and three layers.

Reduced circuit depth by over 30% with new gate decomposition scheme.

Provided evidence for noise resilience and scalability of bucket-brigade QRAM.

Abstract

Quantum random access memory (QRAM) enables efficient classical data access for quantum computers -- a prerequisite for many quantum algorithms to achieve quantum speedup. Despite various proposals, the experimental realization of QRAM remains largely unexplored. Here, we experimentally investigate the circuit-based bucket-brigade QRAM with a superconducting quantum processor. To facilitate the experimental implementation, we introduce a hardware-efficient gate decomposition scheme for quantum routers, which effectively reduces the depth of the QRAM circuit by more than 30% compared to the conventional controlled-SWAP-based implementation. We further propose an error mitigation method to boost the QRAM query fidelity. With these techniques, we are able to experimentally implement the QRAM architectures with two and three layers, achieving query fidelities up to 0.800 $\pm$ 0.026 and 0.604$\pm$0.005, respectively. Additionally, we study the error propagation mechanism and the scalability of our QRAM implementation, providing experimental evidence for the noise resilience nature of the bucket-brigade QRAM architecture. Our results highlight the potential of superconducting quantum processors for realizing a scalable QRAM architecture.