Bias Variation Compensation in Perimeter-Gated SPAD TRNGs

TL;DR

This paper introduces a CMOS-based 64x64 perimeter-gated SPAD array that generates entropy with minimal bias variation, employing a bias compensation technique and classical debiasing to produce high-quality random bits.

Contribution

It presents a novel hardware implementation of a SPAD array with bias variation compensation, enabling reliable random number generation at room temperature.

Findings

Less than 1% bias variation achieved

Raw bit rate of 2 kHz per pixel

Debiased bits pass all NIST tests

Abstract

Random number generators that utilize arrays of entropy source elements suffer from bias variation (BV). Despite the availability of efficient debiasing algorithms, optimized implementations of hardware friendly options depend on the bit bias in the raw bit streams and cannot accommodate a wide BV. In this work, we present a 64 x 64 array of perimeter gated single photon avalanche diodes (pgSPADs), fabricated in a 0.35 {\mu}m standard CMOS technology, as a source of entropy to generate random binary strings with a BV compensation technique. By applying proper gate voltages based on the devices' native dark count rates, we demonstrate less than 1% BV for a raw-bit generation rate of 2 kHz/pixel at room temperature. The raw bits were debiased using the classical iterative Von Neumann's algorithm and the debiased bits were found to pass all of the 16 tests from NIST's Statistical Test Suite.