From Block to Byte: Transforming PCIe SSDs with CXL Memory Protocol and Instruction Annotation
Miryeong Kwon, Donghyun Gouk, Junhyeok Jang, Jinwoo Baek, Hyunwoo You, Sangyoon Ji, Hongjoo Jung, Junseok Moon, Seungkwan Kang, Seungjun Lee, and Myoungsoo Jung

TL;DR
This paper demonstrates how CXL can transform PCIe SSDs into scalable, byte-addressable memory with significant performance improvements through cacheability and annotation mechanisms, enabling memory-storage convergence.
Contribution
It introduces a novel CXL-SSD prototype with annotation mechanisms, showing substantial performance gains and addressing challenges in adapting block storage to CXL's memory-centric model.
Findings
CXL-SSD achieves 10.9x better performance than PCIe memory expanders
Latency is reduced by 5.4x with annotation enhancements
CXL-SSD approaches DRAM-like performance in high locality workloads
Abstract
This paper explores how Compute Express Link (CXL) can transform PCIe-based block storage into a scalable, byte-addressable working memory. We address the challenges of adapting block storage to CXL's memory-centric model by emphasizing cacheability as a key enabler and advocating for Type 3 endpoint devices, referred to as CXL-SSDs. To validate our approach, we prototype a CXL-SSD on a custom FPGA platform and propose annotation mechanisms, Determinism and Bufferability, to enhance performance while preserving data persistency. Our simulation-based evaluation demonstrates that CXL-SSD achieves 10.9x better performance than PCIe-based memory expanders and further reduces latency by 5.4x with annotation enhancements. In workloads with high locality, CXL-SSD approaches DRAM-like performance due to efficient on-chip caching. This work highlights the feasibility of integrating block storage…
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Taxonomy
TopicsAdvanced Data Storage Technologies
