ChatModel: Automating Reference Model Design and Verification with LLMs
Jianmin Ye, Tianyang Liu, Qi Tian, Shengchu Su, Zhe Jiang, Xi Wang

TL;DR
ChatModel leverages large language models to automate and improve the efficiency of reference model generation and verification in complex integrated circuit design, achieving significant performance gains.
Contribution
It introduces ChatModel, a novel LLM-based platform that automates reference model creation and verification through hierarchical agile modeling and building-block strategies.
Findings
55.02% peak performance improvement over alternatives
9.18x increase in reference model design capacity
5.90x faster iterative design and validation process
Abstract
As the complexity of integrated circuit designs continues to escalate, the functional verification becomes increasingly challenging. Reference models, critical for accelerating the verification process, are themselves becoming more intricate and time-consuming to develop. Despite the promise shown by large language models (LLMs) in code programming, effectively generating complex reference models remains a significant hurdle. To address these challenges, we introduce ChatModel, the first LLM-aided agile reference model generation and verification platform. ChatModel streamlines the transition from design specifications to fully functional reference models by integrating design standardization and hierarchical agile modeling. Employing a building-block generation strategy, it not only enhances the design capabilities of LLMs for reference models but also significantly boosts verification…
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Taxonomy
TopicsNatural Language Processing Techniques · Semantic Web and Ontologies · Mathematics, Computing, and Information Processing
