FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks

TL;DR

This paper explores a heterogeneous FPGA and VPU co-processing architecture for space applications, demonstrating its implementation, resource utilization, and performance through custom benchmarks to enable efficient on-board data processing.

Contribution

It introduces a novel FPGA and VPU co-processing system tailored for space data processing, including implementation details and performance evaluation.

Findings

Effective FPGA and VPU data transfer via CIF & LCD interfaces

High VPU computational throughput demonstrated

Resource utilization and system performance characterized

Abstract

The advent of computationally demanding algorithms and high data rate instruments in new space applications pushes the space industry to explore disruptive solutions for on-board data processing. We examine heterogeneous computing architectures involving high-performance and low-power commercial SoCs. The current paper implements an FPGA with VPU co-processing architecture utilizing the CIF & LCD interfaces for I/O data transfers. A Kintex FPGA serves as our framing processor and heritage accelerator, while we offload novel DSP/AI functions to a Myriad2 VPU. We prototype our architecture in the lab to evaluate the interfaces, the FPGA resource utilization, the VPU computational throughput, as well as the entire data handling system's performance, via custom benchmarking.