An Efficient Hardware Implementation of Elliptic Curve Point Multiplication over $GF(2^m)$ on FPGA

TL;DR

This paper presents a high-speed FPGA implementation of elliptic curve point multiplication over GF(2^m), utilizing a hybrid Karatsuba multiplier to significantly improve computation speed for IoT security applications.

Contribution

It introduces a novel finite field multiplication method with a hybrid Karatsuba multiplier, enhancing ECPM performance on FPGA for NIST-recommended curves.

Findings

Maximum frequency of 213 MHz achieved on FPGA.

Significant reduction in computation time compared to existing designs.

Efficient resource utilization with 14,195 LUTs.

Abstract

Elliptic Curve Cryptography (ECC) is widely accepted for ensuring secure data exchange between resource-limited IoT devices. The National Institute of Standards and Technology (NIST) recommended implementation, such as B-163, is particularly well-suited for Internet of Things (IoT) applications. Here, Elliptic Curve Point Multiplication (ECPM) is the most time-critical and resource-intensive operation due to the finite field multiplier. This paper proposes a new implementation method of finite field multiplication using a hybrid Karatsuba multiplier, which achieves a significant improvement in computation time while maintaining a reasonable area footprint. The proposed multiplier, along with a finite field adder, squarer, and extended Euclidean inversion circuit, is used to implement an architecture for ECPM using the Montgomery algorithm. The architecture is evaluated for $GF(2^{163})$ on the Xilinx Virtex-7 FPGA platform, achieving a maximum frequency of 213~MHz and occupying 14,195 Lookup Tables (LUTs). The results demonstrate a significant speedup in computation time and overall performance compared to other reported designs.