FeNN: A RISC-V vector processor for Spiking Neural Network acceleration
Zainab Aizaz, James C. Knight, Thomas Nowotny

TL;DR
FeNN is a fully programmable RISC-V vector processor designed for FPGA-based SNN simulation, achieving high precision and faster performance than GPUs and neuromorphic hardware.
Contribution
The paper introduces FeNN, a novel RISC-V soft vector processor optimized for SNNs on FPGAs, combining programmability with high performance.
Findings
FeNN achieves higher simulation speed than embedded GPU and Loihi.
Using stochastic rounding and saturation improves numerical precision.
FeNN is fully programmable and adaptable for various applications.
Abstract
Spiking Neural Networks (SNNs) have the potential to drastically reduce the energy requirements of AI systems. However, mainstream accelerators like GPUs and TPUs are designed for the high arithmetic intensity of standard ANNs so are not well-suited to SNN simulation. FPGAs are well-suited to applications with low arithmetic intensity as they have high off-chip memory bandwidth and large amounts of on-chip memory. Here, we present a novel RISC-V-based soft vector processor (FeNN), tailored to simulating SNNs on FPGAs. Unlike most dedicated neuromorphic hardware, FeNN is fully programmable and designed to be integrated with applications running on standard computers from the edge to the cloud. We demonstrate that, by using stochastic rounding and saturation, FeNN can achieve high numerical precision with low hardware utilisation and that a single FeNN core can simulate an SNN classifier…
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Taxonomy
MethodsSpiking Neural Networks
