Mapping and Scheduling Spiking Neural Networks On Segmented Ladder Bus Architectures
Phu Khanh Huynh, Francky Catthoor, Anup Das

TL;DR
This paper presents a three-step approach to efficiently deploy spiking neural networks on segmented bus architectures, reducing spike loss and energy use through optimized scheduling and routing.
Contribution
It introduces heuristics and algorithms for traffic analysis, scheduling, and routing to improve SNN deployment on segmented buses, addressing congestion and energy efficiency.
Findings
Eliminates spike loss in simulations
Reduces energy consumption significantly
Improves traffic management for SNNs
Abstract
Large-scale neuromorphic architectures consist of computing tiles that communicate spikes using a shared interconnect. The communication patterns in such systems are inherently sparse, asynchronous, and localized due to the spiking nature of neural events, characterized by temporal sparsity with occasional bursts of traffic. These characteristics necessitate interconnects optimized for handling high-activity bursts while consuming minimal power during idle periods. Dynamic segmented bus has been proposed a promising interconnect for its simplicity, scalability and low power consumption. However, deploying spiking neural network applications on such buses presents challenges, including substantial inter-cluster traffic, which can lead to network congestion, spike loss, and unnecessary energy expenditure. In this paper, we propose a three-step process to deploy SNN applications on dynamic…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Neural Networks and Applications · Ferroelectric and Negative Capacitance Devices
