ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors
Haoran Wu, Ce Guo, Wayne Luk, Robert Mullins

TL;DR
ASPO is a novel Bayesian Optimization method tailored for FPGA-based soft processors, effectively handling categorical constraints and accelerating design evaluation, leading to significant reductions in design and execution times.
Contribution
The paper introduces ASPO, a new BO approach with a customized covariance kernel and evaluation acceleration techniques for FPGA soft processor design.
Findings
Reduces execution time for benchmarks by up to 35%.
Decreases overall design time by up to 74%.
Supports categorical parameters in BO for FPGA soft processors.
Abstract
Bayesian Optimization (BO) has shown promise in tuning processor design parameters. However, standard BO does not support constraints involving categorical parameters such as types of branch predictors and division circuits. In addition, optimization time of BO grows with processor complexity, which becomes increasingly significant especially for FPGA-based soft processors. This paper introduces ASPO, an approach that leverages disjunctive form to enable BO to handle constraints involving categorical parameters. Unlike existing methods that directly apply standard BO, the proposed ASPO method, for the first time, customizes the mathematical mechanism of BO to address challenges faced by soft-processor designs on FPGAs. Specifically, ASPO supports categorical parameters using a novel customized BO covariance kernel. It also accelerates the design evaluation procedure by penalizing the BO…
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Taxonomy
TopicsEmbedded Systems Design Techniques · Advanced Multi-Objective Optimization Algorithms · Numerical Methods and Algorithms
