Depth-Optimal Quantum Layout Synthesis as SAT

TL;DR

This paper introduces a novel SAT-based encoding for quantum circuit layout synthesis that guarantees minimal circuit or CX-gate depth, significantly speeding up the process compared to previous methods.

Contribution

It presents a new encoding for layout synthesis that focuses on depth optimization, enabling faster and more efficient quantum circuit transpilation with minimal CX-gate depth or circuit depth.

Findings

Depth-optimized encoding achieves 10-100x speedup over previous methods.

Minimizing CX-count correlates better with noise reduction than minimizing CX-depth.

Combining CX-count and CX-depth minimization yields the best noise reduction.

Abstract

Quantum circuits consist of gates applied to qubits. Current quantum hardware platforms impose connectivity restrictions on binary CX gates. Hence, Layout Synthesis is an important step to transpile quantum circuits before they can be executed. Since CX gates are noisy, it is important to reduce the CX count or CX depth of the mapped circuits. We provide a new and efficient encoding of Quantum-circuit Layout Synthesis in SAT. Previous SAT encodings focused on gate count and CX-gate count. Our encoding instead guarantees that we find mapped circuits with minimal circuit depth or minimal CX-gate depth. We use incremental SAT solving and parallel plans for an efficient encoding. This results in speedups of more than 10-100x compared to OLSQ2, which guarantees depth-optimality. But minimizing depth still takes more time than minimizing gate count with Q-Synth. We correlate the noise reduction achieved by simulating circuits after (CX)-count and (CX)-depth reduction. We find that minimizing for CX-count correlates better with reducing noise than minimizing for CX-depth. However, taking into account both CX-count and CX-depth provides the best noise reduction.