Unicorn-CIM: Uncovering the Vulnerability and Improving the Resilience of High-Precision Compute-in-Memory
Qiufeng Li, Yiwen Liang, Weidong Cao

TL;DR
Unicorn-CIM identifies vulnerabilities in high-precision compute-in-memory architectures and proposes an algorithm-hardware co-design with lightweight error correction to enhance reliability with minimal overhead.
Contribution
This paper introduces Unicorn-CIM, a novel framework that uncovers soft error vulnerabilities in FP CIM and proposes a co-designed solution to improve its resilience.
Findings
High sensitivity of high-precision DNNs to exponent errors
Efficient ECC scheme with 8.98% logic overhead
Enhanced model robustness and accuracy
Abstract
Compute-in-memory (CIM) architecture has been widely explored to address the von Neumann bottleneck in accelerating deep neural networks (DNNs). However, its reliability remains largely understudied, particularly in the emerging domain of floating-point (FP) CIM, which is crucial for speeding up high-precision inference and on device training. This paper introduces Unicorn-CIM, a framework to uncover the vulnerability and improve the resilience of high-precision CIM, built on static random-access memory (SRAM)-based FP CIM architecture. Through the development of fault injection and extensive characterizations across multiple DNNs, Unicorn-CIM reveals how soft errors manifest in FP operations and impact overall model performance. Specifically, we find that high-precision DNNs are extremely sensitive to errors in the exponent part of FP numbers. Building on this…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsRadiation Effects in Electronics · VLSI and Analog Circuit Testing · Low-power high-performance VLSI design
