Experimental realization of all logic elements and memory latch in SC-CNN Chua's circuit

TL;DR

This paper demonstrates experimentally that a nonlinear Chua's circuit, modeled as a SC-CNN, can generate all basic logic gates and memory elements through attractor hopping, offering a dynamic alternative to static digital logic gates.

Contribution

It provides the first experimental realization of all logic elements and a memory latch in a Chua's circuit using a SC-CNN framework, highlighting potential for dynamic digital logic.

Findings

All basic logic gates are generated via attractor hopping.

The circuit emulates multi-input logic functions.

Logic operations are robust against noise within limits.

Abstract

The Chua's circuit is examined using a State Controlled-Cellular Neural Network (SC-CNN) framework with two logical square wave input signals. We illustrate, in particular, that this nonlinear circuit can generate all the basic logic operations, including OR/NOR, AND/NAND, and XOR/XNOR gates, by making use of the hopping of attractors which this circuit produces in different phase space regimes. Further, it is shown that besides two-inputs, the circuit emulates multi-input logic elements. Moreover, all these logic elements are effectively functioning for a tolerable limit of noise intensity. These observations are experimentally realized. Thus our investigation sheds new light in the field of digital technology where the existing static logic gates may be replaced or complemented by this kind of dynamical nonlinear circuits.