Functional Matching of Logic Subgraphs: Beyond Structural Isomorphism

TL;DR

This paper introduces a novel functional subgraph matching approach for logic circuits that overcomes limitations of structural isomorphism, enabling more accurate detection of functionally equivalent subgraphs despite topological changes.

Contribution

It proposes a two-stage multi-modal framework combining functional embeddings and graph segmentation for robust functional subgraph detection in logic circuits.

Findings

Achieved 93.8% accuracy in functional subgraph detection

Attained 91.3% dice score in fuzzy boundary identification

Demonstrated significant performance improvements over structural methods

Abstract

Subgraph matching in logic circuits is foundational for numerous Electronic Design Automation (EDA) applications, including datapath optimization, arithmetic verification, and hardware trojan detection. However, existing techniques rely primarily on structural graph isomorphism and thus fail to identify function-related subgraphs when synthesis transformations substantially alter circuit topology. To overcome this critical limitation, we introduce the concept of functional subgraph matching, a novel approach that identifies whether a given logic function is implicitly present within a larger circuit, irrespective of structural variations induced by synthesis or technology mapping. Specifically, we propose a two-stage multi-modal framework: (1) learning robust functional embeddings across AIG and post-mapping netlists for functional subgraph detection, and (2) identifying fuzzy boundaries using a graph segmentation approach. Evaluations on standard benchmarks (ITC99, OpenABCD, ForgeEDA) demonstrate significant performance improvements over existing structural methods, with average $93.8\%$ accuracy in functional subgraph detection and a dice score of $91.3\%$ in fuzzy boundary identification. The source code and implementation details can be found at https://github.com/zyzheng17/Functional_Subgraph_Matching-Neurips25.