Test and characterization of multilayer ion traps on fused silica

TL;DR

This paper presents a multi-metal layer ion trap on fused silica, demonstrating reduced power dissipation, effective temperature sensing down to 10 K, and improved trap performance compared to silicon-based traps.

Contribution

It introduces a novel fused silica ion trap design with integrated temperature sensors and automated testing, advancing scalable quantum computing hardware.

Findings

Reduced power dissipation compared to silicon traps

Successful operation of temperature sensors at 10 K

Improved electric field noise performance

Abstract

Ion traps are a promising architecture to host a future quantum computer. Several challenges, such as signal-routing, power dissipation, and fabrication quality need to be overcome to scale ion trap devices to hundreds of ions. Currently, ion traps are often fabricated on silicon substrates which result in high power dissipation. Substrates that lead to lower power dissipation are preferred. In this work, we present a multi-metal layer ion trap on a fused silica substrate that is fabricated and tested in an industrial facility. Its design and material-stack are tailored to minimize power dissipation. Furthermore, we characterize the integrated temperature sensors and verify functionality down to 10 K. Moreover, we demonstrate an automated wafer test to validate each trap chip prior to its integration into experimental setups. Subsequently, we characterize electric field noise and electric stray fields using a single trapped-ion as a probe, showing an improvement in trap performance over similar trap designs realized on silicon substrates.