Circuit structure-preserving error mitigation for High-Fidelity Quantum Simulations

TL;DR

This paper introduces a circuit structure-preserving error mitigation method that maintains the original quantum circuit architecture while effectively reducing gate errors, thereby improving the fidelity of quantum simulations on NISQ devices.

Contribution

It presents a novel error mitigation framework that preserves circuit structure, enabling high-fidelity quantum simulations without altering the original circuit design.

Findings

Achieved high agreement with theoretical predictions on IBM Quantum processors.

Effectively mitigated gate errors across various noise levels.

Enhanced the feasibility of complex quantum simulations on current hardware.

Abstract

Developing methods to accurately characterize and mitigate the impact of noise is crucial for enhancing the fidelity of quantum simulations on Noisy Intermediate-Scale Quantum (NISQ) devices. In this work, we present a circuit structure-preserving error mitigation framework for parameterized quantum circuits. A key advantage of our approach lies in its ability to retain the original circuit architecture while effectively characterizing and mitigating gate errors, enabling robust and high-fidelity simulations. This makes it particularly well suited for small-scale circuits that require repeated execution at large sampling rates. To demonstrate the effectiveness of our method, we perform variational quantum simulations of a non-Hermitian ferromagnetic transverse-field Ising chain on IBM Quantum processors. The mitigated result shows excellent agreement with exact theoretical predictions across a range of noise levels. Our strategy offers a practical solution for addressing gate-induced errors and significantly broadens the scope of feasible quantum simulations on current quantum hardware.