FPQVAR: Floating Point Quantization for Visual Autoregressive Model with FPGA Hardware Co-design

TL;DR

FPQVAR introduces a novel floating-point quantization framework with hardware co-design for visual autoregressive models, significantly reducing memory and computation costs while maintaining high image quality on FPGA hardware.

Contribution

The paper presents the first FPGA-based VAR accelerator with low-bit FP quantization and a comprehensive algorithm-hardware co-design approach, improving efficiency and performance.

Findings

Achieved state-of-the-art quantization results with FID of 3.58 at 4-bit.

Enhanced 6-bit VAR performance to match FP16 accuracy.

FPQVAR FPGA accelerator outperforms integer-based and GPU baselines in throughput and energy efficiency.

Abstract

Visual autoregressive (VAR) modeling has marked a paradigm shift in image generation from next-token prediction to next-scale prediction. VAR predicts a set of tokens at each step from coarse to fine scale, leading to better image quality and faster inference speed compared to existing diffusion models. However, the large parameter size and computation cost hinder its deployment on edge devices. To reduce the memory and computation cost, we propose FPQVAR, an efficient post-training floating-point (FP) quantization framework for VAR featuring algorithm and hardware co-design. At the algorithm level, we first identify the challenges of quantizing VAR. To address them, we propose Dual Format Quantization for the highly imbalanced input activation. We further propose Group-wise Hadamard Transformation and GHT-Aware Learnable Transformation to address the time-varying outlier channels. At the hardware level, we design the first low-bit FP quantizer and multiplier with lookup tables on FPGA and propose the first FPGA-based VAR accelerator featuring low-bit FP computation and an elaborate two-level pipeline. Extensive experiments show that compared to the state-of-the-art quantization method, our proposed FPQVAR significantly improves Fr\'echet Inception Distance (FID) from 10.83 to 3.58, Inception Score (IS) from 175.9 to 241.5 under 4-bit quantization. FPQVAR also significantly improves the performance of 6-bit quantized VAR, bringing it on par with the FP16 model. Our accelerator on AMD-Xilinx VCK190 FPGA achieves a throughput of 1.1 image/s, which is 3.1x higher than the integer-based accelerator. It also demonstrates 3.6x and 2.8x higher energy efficiency compared to the integer-based accelerator and GPU baseline, respectively.