Reconfigurable Integrated Photonic Chips as Dual-Purpose Neuromorphic Accelerators and Physical Unclonable Functions

TL;DR

This paper demonstrates a reconfigurable photonic chip that functions both as a neuromorphic accelerator for signal processing and as a physical unclonable function for hardware security, validated through experimental results.

Contribution

It introduces a dual-purpose reconfigurable photonic integrated mesh that combines neuromorphic acceleration and physical unclonable function capabilities in a single device.

Findings

Successful signal equalization with low bit-error-ratio

Device fingerprints enable secure authentication

Dual functionality validated through experiments

Abstract

In this work, we experimentally validate the dual use of a reconfigurable photonic integrated mesh as a neuromorphic accelerator, targeting signal equalization, and as a physical unclonable function offering authentication at the hardware level. The processing node is an optical spectrum slicing self-coherent transceiver targeting the mitigation of dispersion impairments of an intensity detected QPSK signal, after 25 km of transmission at 32 Gbaud. Unavoidable fabrication related imperfections of the nodes, such as waveguide roughness, can act as fingerprints of the device, and, during neuromorphic processing, result in unique weights at the digital back-end during signal equalization. Extracted security metrics offer low false positive/negative probability for the generated responses, confirming un-clonability, whereas bit-error-ratio for the QPSK equalization task was always below the hardware forward error correction limit. The experimental results substantiate the capability of the proposed scheme to simultaneously act as an accelerator and as a security token.