Assessing the Performance of Analog Training for Transfer Learning

TL;DR

This paper evaluates the effectiveness of the c-TTv2 algorithm for analog transfer learning using a Swin-ViT model on CIFAR100, addressing device variability and robustness issues.

Contribution

It introduces and assesses the c-TTv2 algorithm for analog transfer learning, demonstrating its robustness to device imperfections and variability.

Findings

c-TTv2 performs well on CIFAR100 with Swin-ViT.

The algorithm shows robustness to device noise and symmetry variations.

It advances analog transfer learning with practical device considerations.

Abstract

Analog in-memory computing is a next-generation computing paradigm that promises fast, parallel, and energy-efficient deep learning training and transfer learning (TL). However, achieving this promise has remained elusive due to a lack of suitable training algorithms. Analog memory devices exhibit asymmetric and non-linear switching behavior in addition to device-to-device variation, meaning that most, if not all, of the current off-the-shelf training algorithms cannot achieve good training outcomes. Also, recently introduced algorithms have enjoyed limited attention, as they require bi-directionally switching devices of unrealistically high symmetry and precision and are highly sensitive. A new algorithm chopped TTv2 (c-TTv2), has been introduced, which leverages the chopped technique to address many of the challenges mentioned above. In this paper, we assess the performance of the c-TTv2 algorithm for analog TL using a Swin-ViT model on a subset of the CIFAR100 dataset. We also investigate the robustness of our algorithm to changes in some device specifications, including weight transfer noise, symmetry point skew, and symmetry point variability