A Virtual Admittance-Based Fault Current Limiting Method for Grid-Forming Inverters

TL;DR

This paper introduces a novel hybrid fault current limiting method for grid-forming inverters using virtual admittance, effectively managing high fault currents during phase jumps and improving power system reliability.

Contribution

It proposes a new hybrid fault current limiting approach based on virtual admittance, addressing phase jump disturbances overlooked by existing methods.

Findings

Effective fault current limiting during phase jumps.

Validated through electromagnetic transient simulations.

Potential to enhance grid stability with GFM inverters.

Abstract

Inverter-based resources (IBRs) are a key component in the ongoing modernization of power systems, with grid-forming (GFM) inverters playing a central role. Effective fault current limiting is a major challenge to modernizing power systems through increased penetration of GFM inverters. Due to their voltage-source nature, GFM inverters offer no direct control over the output current and, therefore, are susceptible to high fault currents. This vulnerability is especially pronounced during large phase jumps, a condition overlooked by most fault current limiting methods. This paper proposes a hybrid fault current limiting method implemented through a virtual admittance by leveraging the advantages of two virtual impedance (VI)-based methods tailored for three-phase faults and phase jump disturbances. Electromagnetic transient simulations conducted in MATLAB-Simulink demonstrate the method's effectiveness across various disturbances, validating its potential in single-loop GFM structures.